IPT-C2H-NIOS Altera, IPT-C2H-NIOS Datasheet - Page 77

• Manufacturer Part Number: IPT-C2H-NIOS
• Description: C2H COMPILER FOR NIOS II
• Manufacturer: Altera
• Series: Nios®IIr
• Type: Nios IIr

Specifications of IPT-C2H-NIOS

• Function: C to Hardware Compiler
• License: Initial License
• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Figure 3–17. Using Another Pointer to Avoid Self-Dependence
Altera Corporation
November 2009
1
1
Using Physically Separate Slave Ports to Break Dependencies
If the master ports associated with two pointers do not access any shared
slave ports in the SOPC Builder system, then the C2H Compiler assumes
that the pointers do not alias. Section
page 3–23
be an effective method to prevent aliasing.
Read Operations with Latency
Memory latency and other access delays affect how the C2H Compiler
schedules operations. Inherently, an operation cannot proceed until the
data for the operation arrives, which depends on memory latency. The
C2H Compiler generates logic within hardware accelerators to manage
If a data structure is referenced by two pointers and one or more
of them is restrict-qualified, the ISO C 99 standard specifies that
the behavior is undefined. Therefore, make sure that you fully
understand the range of values that a pointer can take on during
the execution of your application before applying the
_ _ restrict__ qualifier. Improper application can result in
undesirable functional changes to the code than cannot be
debugged in software, due to the limitations of restrict-based
optimizations in conventional compilers.
The ISO C 99 standard specifies that the volatile type
qualifier overrides the __restrict__ pointer type. This
means that _ _restrict__ has no effect on volatile
pointers. To break pointer dependencies between volatile
pointers, use separate interrupt-enabled accelerators instead of
multiple loops in the same accelerator. For details about
interrupt-enabled accelerators, see
page
describes how to limit the master-slave connections, which can
6–4.
9.1
“Master-Slave Connections” on
C-to-Hardware Mapping Reference
Nios II C2H Compiler User Guide
“Interrupt Pragma” on
3–37