ADV212-ASD-P160-EB Analog Devices Inc, ADV212-ASD-P160-EB Datasheet - Page 34

• Manufacturer Part Number: ADV212-ASD-P160-EB
• Description: BOARD EVAL FOR ADV212 CODEC
• Manufacturer: Analog Devices Inc

Specifications of ADV212-ASD-P160-EB

• Module/board Type: Evaluation Board
• For Use With/related Products: ADV212
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADV212
APPLICATIONS INFORMATION
This section describes typical video applications for the
ADV212 JPEG2000 video processor.
ENCODE—MULTICHIP MODE
Due to the data input rate limitation (see Table 22), an 1080i
application requires at least two ADV212s to encode or decode
full-resolution 1080i video. In encode mode, the ADV212
accepts Y and CbCr data on separate buses. An encode example
is shown in Figure 33.
32-BIT HOST CPU
DATA[31:0]
ADDR[3:0]
DREQ
DACK
DREQ
DACK
GPIO
ACK
ACK
IRQ
IRQ
WR
WR
CS
RD
CS
RD
Figure 33. Encode—Multichip Application
HDATA[31:0]
ADDR[3:0]
CS
RD
ACK
WE
IRQ
DREQ
DACK
SCOMM[5]
HDATA[31:0]
ADDR[3:0]
CS
RD
WE
ACK
IRQ
DREQ
DACK
SCOMM[5]
ADV212_1_SLAVE
ADV212_2_SLAVE
VDATA[11:2]
VDATA[11:2]
Rev. B | Page 34 of 44
HSYNC
HSYNC
VSYNC
VSYNC
MCLK
FIELD
MCLK
FIELD
VCLK
VCLK
CbCr
In decode mode, a master/slave configuration (as shown in
Figure 34) or a slave/slave configuration can be used to
synchronize the outputs of the two ADV212s.
Applications that have two separate VDATA outputs sent to an
FPGA or buffer before they are sent to an encoder do not
require synchronization at the ADV212 outputs.
74.25MHz
OSC
CbCr
Y
LLC
Y[9:0]
C[9:0]
10-BIT SD/HD
DECODER
VIDEO
1080i
VIDEO IN