PIC12F519-I/MC Microchip Technology, PIC12F519-I/MC Datasheet - Page 40

• Manufacturer Part Number: PIC12F519-I/MC
• Description: IC PIC MCU FLASH 1KX12 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F519-I/MC

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 8MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 41Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Package: 8DFN EP
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 6
• Interface Type: USB
• Number Of Timers: 1
• Processor Series: PIC12F
• Core: PIC
• Data Ram Size: 41 B
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164334 - MODULE SOCKET FOR 8L 2X3MM DFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12F519
REGISTER 8-1:
DS41319B-page 38
bit 7
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1: Refer to the “PIC12F519 Memory Programming Specification”, DS41316 to determine how to
—
2: DRT length (18 ms or 1 ms) is a function of clock mode selection. It is the responsibility of the application
program/erase the Configuration Word.
designer to ensure the use of either 18 ms (nominal) DRT or the 1 ms (nominal) DRT will result in
acceptable operation. Refer to Figure 11-1 and Table 11-2 for V
this mode of operation.
Unimplemented: Read as ‘1’
CPDF: Code Protection bit - Flash Data Memory
1 = Code protection off
0 = Code protection on
IOSCFS: Internal Oscillator Frequency Select bit
1 = 8 MHz INTOSC frequency
0 = 4 MHz INTOSC frequency
MCLRE: Master Clear Enable bit
1 = GP3/MCLR pin functions as MCLR
0 = GP3/MCLR pin functions as GP3, MCLR internally tied to V
CP: Code Protection bit - User Program Memory
1 = Code protection off
0 = Code protection on
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC<1:0>: Oscillator Selection bits
00 = LP oscillator with 18 ms DRT
01 = XT oscillator with 18 ms DRT
10 = INTOSC with 1 ms DRT
11 = EXTRC with 1 ms DRT
CPDF
CONFIG: CONFIGURATION WORD REGISTER
IOSCFS
(2)
(2)
MCLRE
(2)
(2)
CP
DD
(1)
WDTE
rise time and stability requirements for
DD
© 2008 Microchip Technology Inc.
FOSC1
FOSC0
bit 0