PIC12F519-I/MC Microchip Technology, PIC12F519-I/MC Datasheet - Page 55

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PIC12F519-I/MC

Manufacturer Part Number
PIC12F519-I/MC
Description
IC PIC MCU FLASH 1KX12 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F519-I/MC

Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
64Byte
Ram Memory Size
41Byte
Cpu Speed
8MHz
No. Of Timers
1
Package
8DFN EP
Device Core
PIC
Family Name
PIC12
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
6
Interface Type
USB
Number Of Timers
1
Processor Series
PIC12F
Core
PIC
Data Ram Size
41 B
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164334 - MODULE SOCKET FOR 8L 2X3MM DFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F519-I/MC
Manufacturer:
SST
Quantity:
101
DECF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
DECFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected: None
Description:
© 2008 Microchip Technology Inc.
Decrement f
[ label ] DECF f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – 1 → (dest)
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – 1 → d;
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘0’, the next instruc-
tion, which is already fetched, is
discarded and a NOP is executed
instead making it a two-cycle
instruction.
Unconditional Branch
[ label ]
0 ≤ k ≤ 511
k → PC<8:0>;
STATUS<6:5> → PC<10:9>
GOTO is an unconditional branch.
The 9-bit immediate value is
loaded into PC bits <8:0>. The
upper bits of PC are loaded from
STATUS<6:5>. GOTO is a two-
cycle instruction.
GOTO k
skip if result = 0
INCF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
Increment f
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
(f) + 1 → (dest)
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
Increment f, Skip if 0
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
(f) + 1 → (dest), skip if result = 0
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘0’, then the next
instruction, which is already
fetched, is discarded and a NOP is
executed instead making it a
two-cycle instruction.
Inclusive OR literal with W
[ label ]
0 ≤ k ≤ 255
(W) .OR. (k) → (W)
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the
W register.
PIC12F519
INCF f,d
INCFSZ f,d
IORLW k
DS41319B-page 53

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