PIC16F1938-I/ML Microchip Technology, PIC16F1938-I/ML Datasheet - Page 210

• Manufacturer Part Number: PIC16F1938-I/ML
• Description: IC MCU 8BIT FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/ML

• Core Size: 8-Bit
• Program Memory Size: 28KB (16K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1024Byte
• Cpu Speed: 32MHz
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F193X/LF193X
19.6.7
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can be simultaneously available on
multiple pins.
Once
(CCPxM<3:2> = 11
CCPxCON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STRx<D:A> bits of the
PSTRxCON register, as shown in Table 19-7.
REGISTER 19-6:
DS41364C-page 210
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
the
The PWM Steering mode is available only when the CCPxCON register bits CCPxM<3:2> = 11 and
PxM<1:0> = 00.
PULSE STEERING MODE
Single
Unimplemented: Read as ‘0’
STRxSYNC: Steering Sync bit
1 = Output steering update occurs on next PWM period
0 = Output steering update occurs at the beginning of the instruction cycle boundary
STRxD: Steering Enable bit D
1 = P1D pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1D pin is assigned to port pin
STRxC: Steering Enable bit C
1 = P1C pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1C pin is assigned to port pin
STRxB: Steering Enable bit B
1 = P1B pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1B pin is assigned to port pin
STRxA: Steering Enable bit A
1 = P1A pin has the PWM waveform with polarity control from CCPxM<1:0>
0 = P1A pin is assigned to port pin
U-0
—
and
PSTRXCON: PULSE STEERING CONTROL REGISTER
Output
PxM<1:0> = 00
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
mode
U-0
—
is
selected
STRxSYNC
of
R/W-0/0
Preliminary
the
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
STRxD
While the PWM Steering mode is active, CCPxM<1:0>
bits of the CCPxCON register select the PWM output
polarity for the P1<D:A> pins.
The PWM auto-shutdown operation also applies to
PWM Steering mode as described in Section 19.6.4
“Enhanced
auto-shutdown event will only affect pins that have
PWM outputs enabled.
Note:
The associated TRIS bits must be set to
output (‘0’) to enable the pin output driver
in order to see the PWM signal on the pin.
R/W-0/0
STRxC
PWM
Auto-shutdown
(1)
© 2009 Microchip Technology Inc.
R/W-0/0
STRxB
mode”.
R/W-1/1
STRxA
bit 0
An