PIC16F1938-I/ML Microchip Technology, PIC16F1938-I/ML Datasheet - Page 92

IC MCU 8BIT FLASH 28QFN

PIC16F1938-I/ML

Manufacturer Part Number
PIC16F1938-I/ML
Description
IC MCU 8BIT FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/ML

Core Size
8-Bit
Program Memory Size
28KB (16K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1024Byte
Cpu Speed
32MHz
Package
28QFN EP
Device Core
PIC
Family Name
PIC16
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1938-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F193X/LF193X
REGISTER 6-6:
REGISTER 6-7:
REGISTER 6-8:
DS41364C-page 92
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
R/W-1/1
R/W-x/u
R/W-x/u
WPUB7
LATB7
RB7
2:
Writes to PORTB are actually written to corresponding LATB register. Reads from PORTB register is
return of actual I/O pin values.
Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
RB<7:0>: PORTB I/O Pin bit
1 = Port pin is > V
0 = Port pin is < V
LATB<7:0>: PORTB Output Latch Value bits
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
R/W-1/1
R/W-x/u
R/W-x/u
WPUB6
LATB6
RB6
PORTB: PORTB REGISTER
LATB: PORTB DATA LATCH REGISTER
WPUB: WEAK PULL-UP PORTB REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-1/1
R/W-x/u
R/W-x/u
WPUB5
LATB5
IH
IL
RB5
R/W-1/1
R/W-x/u
R/W-x/u
WPUB4
LATB4
RB4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(1)
R/W-x/u
R/W-x/u
R/W-1/1
WPUB3
LATB3
RB3
R/W-x/u
R/W-x/u
R/W-1/1
WPUB2
LATB2
RB2
© 2009 Microchip Technology Inc.
R/W-x/u
R/W-x/u
R/W-1/1
WPUB1
LATB1
RB1
R/W-1/1
R/W-x/u
R/W-x/u
WPUB0
LATB0
RB0
bit 0
bit 0
bit 0

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