PIC16F1938-I/ML Microchip Technology, PIC16F1938-I/ML Datasheet - Page 70

• Manufacturer Part Number: PIC16F1938-I/ML
• Description: IC MCU 8BIT FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/ML

• Core Size: 8-Bit
• Program Memory Size: 28KB (16K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1024Byte
• Cpu Speed: 32MHz
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F193X/LF193X
TABLE 3-7:
TABLE 3-8:
DS41364C-page 70
BORCON
PCON
STATUS
WDTCON
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1:
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up from Sleep
Brown-out Reset
Interrupt Wake-up from Sleep
RESET Instruction Executed
Stack Overflow Reset (STVREN = 1)
Stack Underflow Reset (STVREN = 1)
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1:
Name
2:
Shaded cells are not used by Resets.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with
the interrupt vector (0004h) after execution of PC + 1.
If a Status bit is not implemented, that bit will be read as ‘0’.
SBOREN
STKOVF
Bit 7
—
—
Condition
RESET CONDITION FOR SPECIAL REGISTERS
SUMMARY OF REGISTERS ASSOCIATED WITH RESETS
STKUNF
Bit 6
—
—
—
WDTPS4 WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN
Bit 5
—
—
—
Bit 4
Preliminary
TO
—
—
Program
PC + 1
Counter
PC + 1
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
(1)
RMCLR
Bit 3
PD
—
(2)
Bit 2
---1 1000
---u uuuu
---1 0uuu
---0 uuuu
---0 0uuu
---1 1uuu
---1 0uuu
---u uuuu
---u uuuu
---u uuuu
—
RI
Z
Register
STATUS
Bit 1
POR
DC
—
© 2009 Microchip Technology Inc.
BORRDY
Bit 0
BOR
00-- 110x
uu-- 0uuu
uu-- 0uuu
uu-- uuuu
uu-- uuuu
00-- 11u0
uu-- uuuu
uu-- u0uu
1u-- uuuu
u1-- uuuu
C
Register
PCON
Register
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