PIC16C770-I/SO Microchip Technology, PIC16C770-I/SO Datasheet - Page 100

IC MCU OTP 2KX14 A/D PWM 20-SOIC

PIC16C770-I/SO

Manufacturer Part Number
PIC16C770-I/SO
Description
IC MCU OTP 2KX14 A/D PWM 20-SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C770-I/SO

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16C770I/SO
PIC16C717/770/771
9.2.17.3
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 9-29:
FIGURE 9-30:
DS41120B-page 98
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
BUS COLLISION DURING A STOP
CONDITION
SDA
PEN
SCL
P
’0’
’0’
’0’
’0’
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
Assert SDA
SDA asserted low
T
BRG
T
BRG
Advance Information
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to ‘0’. After the BRG times out SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data '0' (Figure 9-29). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master attempt-
ing to drive a data '0' (Figure 9-30).
SCL goes low before SDA goes high
Set BCLIF
T
BRG
T
BRG
2002 Microchip Technology Inc.
’0’
’0’
SDA sampled
low after T
Set BCLIF
BRG
,

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