PIC16C770-I/SO Microchip Technology, PIC16C770-I/SO Datasheet - Page 57

• Manufacturer Part Number: PIC16C770-I/SO
• Description: IC MCU OTP 2KX14 A/D PWM 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C770-I/SO

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Number Of I /o: 15
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC16C770I/SO

8.2.3
When generate software interrupt is chosen, the CCP1
pin is not affected. Only an ECCP interrupt is generated
(if enabled).
8.2.4
In this mode, an internal hardware trigger is generated,
which may be used to initiate an action.
The special event trigger output of ECCP resets the
TMR1 register pair. This allows the CCPR1 register to
effectively be a 16-bit programmable period register for
Timer1.
The special event trigger output of ECCP module will
also start an A/D conversion if the A/D module is
enabled.
TABLE 8-2:
INTCON
PIR1
PIE1
TRISB
TMR1L
TMR1H
T1CON
CCPR1L
CCPR1H
CCP1CON
Legend:
2002 Microchip Technology Inc.
Note:
Name
x = unknown, u = unchanged, - = unimplemented read as ’0’. Shaded cells are not used by Capture and Timer1.
The special event trigger will not set the
interrupt flag bit TMR1IF (PIR1<0>).
SOFTWARE INTERRUPT MODE
SPECIAL EVENT TRIGGER
PORTB Data Direction Register
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1register
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
PWM1M1
PSPIF
PSPIE
Bit 7
GIE
—
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
(1)
(1)
PWM1M0
Bit 6
ADIE
PEIE
ADIF
—
T1CKPS
DC1B1
Bit 5
RCIF
RCIE
T0IE
1
T1CKP
DC1B0
Bit 4
INTE
TXIF
TXIE
S0
T1OSCEN
CCP1M3
SSPIF
SSPIE
Bit 3
RBIE
FIGURE 8-2:
RB3/CCP1/
P1A Pin
T1SYNC
CCP1M2
CCP1IF
CCP1IE
Bit 2
T0IF
Special event trigger will:
RESET Timer1, but not set interrupt flag bit
TMR1IF (PIR1<0>).
PIC16C717/770/771
Output Enable
TRISB<3>
TMR1CS
CCP1M1
TMR2IF
TMR2IE
Bit 1
INTF
Q
Special Event Trigger
R
S
CCP1CON<3:0>
Mode Select
CCP1M0
TMR1IF
TMR1IE
TMR1O
COMPARE MODE
OPERATION BLOCK
DIAGRAM
Bit 0
Output
RBIF
Logic
N
(PIR1<2>)
Set flag bit CCP1IF
match
0000 000x
0000 0000
0000 0000
1111 1111
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
0000 0000
Value on
POR,
BOR
DS41120B-page 55
CCPR1H CCPR1L
TMR1H
Comparator
0000 000u
0000 0000
0000 0000
1111 1111
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
Value on
RESETS
all other
TMR1L