PIC16LF88-I/P Microchip Technology, PIC16LF88-I/P Datasheet - Page 16
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PIC16LF88-I/P
Manufacturer Part Number
PIC16LF88-I/P
Description
IC MCU FLASH 4KX14 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F87-IP.pdf
(228 pages)
4.PIC16F87-IP.pdf
(8 pages)
5.PIC16F87-IP.pdf
(4 pages)
6.PIC16F87-IP.pdf
(8 pages)
7.PIC16F88-ISO.pdf
(214 pages)
Specifications of PIC16LF88-I/P
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Package
18PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Data Rom Size
256 B
Height
3.3 mm
Length
22.86 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF88-I/P
Manufacturer:
Microchip
Quantity:
1 302
PIC16F87/88
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
DS30487B-page 14
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1:
Address
Bank 0
(2)
(2)
(2)
(2)
(1,2)
(2)
2:
3:
4:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
ADRESH
ADCON0
Name
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<12:8>, whose
contents are transferred to the upper byte of the program counter.
These registers can be addressed from any bank.
RA5 is an input only; the state of the TRISA5 bit has no effect and will always read ‘1’.
PIC16F88 device only.
SPECIAL FUNCTION REGISTERS
—
—
—
—
—
—
(4)
(4)
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Timer0 Module Register
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTA Data Latch when written; PORTA pins when read (PIC16F87)
PORTA Data Latch when written; PORTA pins when read (PIC16F88)
PORTB Data Latch when written; PORTB pins when read (PIC16F87)
PORTB Data Latch when written; PORTB pins when read (PIC16F88)
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register 1 (LSB)
Capture/Compare/PWM Register 1 (MSB)
USART Transmit Data Register
USART Receive Data Register
Unimplemented
Unimplemented
Unimplemented
A/D Result Register High Byte
ADCS1
OSFIF
WCOL
SPEN
Bit 7
GIE
IRP
—
—
—
—
—
TOUTPS3 TOUTPS2
SSPOV
T1RUN
ADCS0
CMIF
PEIE
ADIF
Bit 6
RP1
RX9
—
—
T1CKPS1
TMR0IE
SSPEN
CCP1X
SREN
CHS2
RCIF
Bit 5
RP0
—
—
Write Buffer for the upper 5 bits of the Program Counter
TOUTPS1
T1CKPS0
CCP1Y
INT0IE
CREN
CHS1
EEIF
Preliminary
Bit 4
TXIF
CKP
TO
T1OSCEN
TOUTPS0
CCP1M3
SSPM3
ADDEN
SSPIF
CHS0
RBIE
Bit 3
PD
—
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral feature section.
GO/DONE
TMR2ON
T1SYNC
CCP1M2
TMR0IF
CCP1IF
SSPM2
FERR
Bit 2
—
Z
T2CKPS1
TMR1CS
CCP1M1
TMR2IF
SSPM1
INT0IF
OERR
Bit 1
DC
—
—
2003 Microchip Technology Inc.
T2CKPS0
TMR1ON
CCP1M0
TMR1IF
SSPM0
ADON
RX9D
RBIF
Bit 0
—
C
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx 0000
xxx0 0000
xxxx xxxx
00xx xxxx
---0 0000
0000 000x
-000 0000
00-0 ----
xxxx xxxx
xxxx xxxx
-000 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
0000 00-0 114, 120
POR, BOR
Value on:
—
—
—
—
—
—
26, 135
Details
19, 69,
21, 77
23, 34
77, 83
77, 83
72, 83
80, 85
80, 85
90, 95
89, 95
83, 85
83, 85
81, 83
98, 99
page
135
135
103
105
120
on
69
17
52
58
—
—
—
77
—
—
—