PIC18F67J90-I/PT Microchip Technology, PIC18F67J90-I/PT Datasheet - Page 168

• Manufacturer Part Number: PIC18F67J90-I/PT
• Description: IC PIC MCU FLASH 128KB 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 3.8310546875KB
• Cpu Speed: 48MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J90 FAMILY
TABLE 15-4:
15.2.9
The real-time crystal input can be calibrated using the
periodic auto-adjust feature. When properly calibrated,
the RTCC can provide an error of less than three
seconds per month.
To perform this calibration, find the number of error
clock pulses and store the value into the lower half of
the RTCCAL register. The 8-bit, signed value, loaded
into RTCCAL, is multiplied by 4 and will either be added
or subtracted from the RTCC timer, once every minute.
To calibrate the RTCC module:
1.
2.
EQUATION 15-1:
3.
DS39933D-page 168
ALRMPTR<1:0>
(Ideal Frequency (32,758) – Measured Frequency) * 60 =
Error Clocks per Minute
Use another timer resource on the device to find
the error of the 32.768 kHz crystal.
Convert the number of error clock pulses per
minute (see Equation 15-1).
• If the oscillator is faster than ideal (negative result
• If the oscillator is slower than ideal (positive
Load the RTCCAL register with the correct value.
from step 2), the RCFGCALL register value
needs to be negative. This causes the specified
number of clock pulses to be subtracted from the
timer counter once every minute.
result from step 2), the RCFGCALL register
value needs to be positive. This causes the
specified number of clock pulses to be added to
the timer counter once every minute.
00
01
10
11
CALIBRATION
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
ALRMVALH
ALRMMIN
ALRMWD
CONVERTING ERROR,
CLOCK PULSES
—
ALRMVALL
ALRMSEC
ALRMDAY
ALRMHR
—
Writes to the RTCCAL register should occur only when
the timer is turned off or immediately after the rising
edge of the seconds pulse.
15.3
The alarm features and characteristics are:
• Configurable from half a second to one year
• Enabled using the ALRMEN bit (ALRMCFG<7>,
• Offers one-time and repeat alarm options
15.3.1
The alarm feature is enabled using the ALRMEN bit.
This bit is cleared when an alarm is issued. The bit will
not be cleared if the CHIME bit = 1 or if ALRMRPT  0.
The interval selection of the alarm is configured
through the ALRMCFG (AMASK<3:0>) bits (see
Figure 15-5). These bits determine which and how
many digits of the alarm must match the clock value for
the alarm to occur.
The alarm can also be configured to repeat based on a
preconfigured interval. The number of times this
occurs, after the alarm is enabled, is stored in the
ALRMRPT register.
Note:
Register 15-4)
Note:
Alarm
In determining the crystal’s error value, it
is the user’s responsibility to include the
crystal’s initial error from drift due to
temperature or crystal aging.
CONFIGURING THE ALARM
While the alarm is enabled (ALRMEN = 1),
changing any of the registers, other than
the RTCCAL, ALRMCFG and ALRMRPT
registers and the CHIME bit, can result in
a false alarm event leading to a false
alarm interrupt. To avoid this, only change
the timer and alarm values while the alarm
is disabled (ALRMEN = 0). It is recom-
mended
ALRMRPT registers and CHIME bit be
changed when RTCSYNC = 0.
that
 2010 Microchip Technology Inc.
the
ALRMCFG
and