PIC18F67J90-I/PT Microchip Technology, PIC18F67J90-I/PT Datasheet - Page 79

• Manufacturer Part Number: PIC18F67J90-I/PT
• Description: IC PIC MCU FLASH 128KB 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 3.8310546875KB
• Cpu Speed: 48MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 6-3:
 2010 Microchip Technology Inc.
PORTJ
PORTH
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
SPBRGH1
BAUDCON1
LCDDATA23
LCDDATA22
LCDDATA21
LCDDATA20
LCDDATA19
LCDDATA18
LCDDATA17
LCDDATA16
LCDDATA15
LCDDATA14
LCDDATA13
LCDDATA12
LCDDATA11
LCDDATA10
LCDDATA9
LCDDATA8
LCDDATA7
LCDDATA6
LCDDATA5
CCPR1H
CCPR1L
CCP1CON
CCPR2H
CCPR2L
CCP2CON
SPBRG2
RCREG2
TXREG2
TXSTA2
RCSTA2
RTCCFG
RTCCAL
RTCVALH
Legend:
Note 1:
File Name
2:
3:
4:
5:
(2)
(2)
(2)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
These registers and/or bits are available only on 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset states shown are
for 80-pin devices.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking” for details.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See Section 3.4.3 “PLL
Frequency Multiplier” for details.
RA<7:6> and their associated latch and direction bits are configured as port pins only when the internal oscillator is selected as the default
clock source (FOSC2 Configuration bit = 0); otherwise, they are disabled and these bits read as ‘0’.
(2)
(2)
(2)
EUSART Baud Rate Generator High Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 2 High Byte
Capture/Compare/PWM Register 2 Low Byte
AUSART Baud Rate Generator Register
AUSART Receive Register
AUSART Transmit Register
RTCC Value High Register Window based on RTCPTR<1:0>
ABDOVF
S39C3
S39C2
S39C1
RTCEN
RA7
S47C3
S31C3
S23C3
S15C3
S07C3
S47C2
S31C2
S23C2
S15C2
S07C2
S47C1
S31C1
S23C1
S15C1
S07C1
S47C0
RDPU
CSRC
SPEN
CAL7
Bit 7
RH7
RF7
RE7
RD7
RC7
RB7
RJ7
—
—
PIC18F87J90 FAMILY REGISTER FILE SUMMARY (CONTINUED)
(5)
(2)
(2)
(2)
S38C3
S38C2
S38C1
RA6
RCIDL
S46C3
S30C3
S22C3
S14C3
S06C3
S46C2
S30C2
S22C2
S14C2
S06C2
S46C1
S30C1
S22C1
S14C1
S06C1
S46C0
REPU
CAL6
Bit 6
RH6
RF6
RE6
RD6
RC6
RB6
RX9
RJ6
TX9
—
—
—
(5)
(2)
(2)
(2)
RTCWREN
S37C3
S37C2
S37C1
RJPU
RXDTP
DC1B1
DC2B1
S45C3
S29C3
S21C3
S13C3
S05C3
S45C2
S29C2
S21C2
S13C2
S05C2
S45C1
S29C1
S21C1
S13C1
S05C1
S45C0
SREN
TXEN
CAL5
Bit 5
RH5
RD5
RC5
RF5
RE5
RB5
RA5
RJ5
(2)
(2)
(2)
(2)
RTCSYNC
S36C3
S36C2
S36C1
TXCKP
DC1B0
DC2B0
S44C3
S28C3
S20C3
S12C3
S04C3
S44C2
S28C2
S20C2
S12C2
S04C2
S44C1
S28C1
S20C1
S12C1
S04C1
S44C0
CREN
SYNC
CAL4
Bit 4
RH4
RG4
RE4
RD4
RC4
RB4
RA4
RJ4
RF4
(2)
(2)
(2)
HALFSEC
S35C3
S35C2
S35C1
CCP1M3
CCP2M3
ADDEN
BRG16
S43C3
S27C3
S19C3
S11C3
S03C3
S43C2
S27C2
S19C2
S11C2
S03C2
S43C1
S27C1
S19C1
S11C1
S03C1
S43C0
CAL3
Bit 3
RH3
RG3
RE3
RD3
RC3
RB3
RA3
RJ3
RF3
—
PIC18F87J90 FAMILY
(2)
(2)
(2)
S34C3
S34C2
S34C1
CCP1M2
CCP2M2
RTCOE
S42C3
S26C3
S18C3
S10C3
S02C3
S42C2
S26C2
S18C2
S10C2
S02C2
S42C1
S26C1
S18C1
S10C1
S02C1
S42C0
BRGH
FERR
CAL2
Bit 2
RG2
RH2
RF2
RD2
RC2
RB2
RA2
RJ2
—
—
(2)
(2)
(2)
2
C™ Slave mode. See Section 18.4.3.2 “Address
RTCPTR1
S33C3
S33C2
S33C1
CCP1M1
CCP2M1
S41C3
S25C3
S17C3
S09C3
S01C3
S41C2
S25C2
S17C2
S09C2
S01C2
S41C1
S25C1
S17C1
S09C1
S01C1
S41C0
OERR
TRMT
CAL1
WUE
Bit 1
RG1
RH1
RF1
RE1
RD1
RC1
RB1
RA1
RJ1
(2)
(2)
(2)
RTCPTR0
CCP1M0
CCP2M0
ABDEN
S40C3
S32C3
S24C3
S16C3
S08C3
S00C3
S40C2
S32C2
S24C2
S16C2
S08C2
S00C2
S40C1
S32C1
S24C1
S16C1
S08C1
S00C1
S40C0
RX9D
TX9D
CAL0
Bit 0
RH0
RG0
RD0
RC0
RE0
RB0
RA0
RJ0
—
xxxx xxxx
xxxx xxxx
000x xxxx
xxxx xxx-
xxxx x-xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xx0x 0000
0000 0000
0100 0-00
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
0000 0000
0000 0000
0000 -010
0000 000x
0-00 0000
0000 0000
xxxx xxxx
POR, BOR
DS39933D-page 79
Value on
Details on
62, 138
62, 136
62, 134
62, 132
63, 129
63, 127
63, 125
63, 122
63, 119
63, 259
63, 258
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 187
63, 174
63, 174
63, 173
63, 174
64, 174
64, 173
64, 278
64, 283
64, 281
64, 276
64, 277
64, 157
64, 158
64, 160
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