PIC18F27J53-I/SP Microchip Technology, PIC18F27J53-I/SP Datasheet - Page 30

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PIC18F27J53-I/SP

Manufacturer Part Number
PIC18F27J53-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J53-I/SP

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J53-I/SP
Manufacturer:
MITSUBISHI
Quantity:
12
PIC18F2XJXX/4XJXX FAMILY
6.0
DS39687E-page 30
Standard Operating Conditions
Operating Temperature: 25°C is recommended
Param
P1
P2
P2A
P2B
P3
P4
P5
P5A
P6
P9
P10
P11
P12
P13
P14
P16
P17
P19
P20
Note 1:
No.
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
AC/DC CHARACTERISTICS TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE (CONTINUED)
DLY
R
PGC
PGCL
PGCH
SET
HLD
DLY
DLY
DLY
DLY
DLY
HLD
SET
VALID
DLY
HLD
KEY
KEY
External power must be supplied to the V
Section 2.1.1 “PIC18F2XJXX/4XJXX/ LF2XJXX/LF4XJXX Devices and the On-Chip Voltage Regulator” for
more information.
V
of V
1
1
1
1
2
5
6
7
2
2
8
3
1
2
DD
A
DD
must also be supplied to the AV
MCLR Rise Time to Enter Program/Verify
mode
Serial Clock (PGC) Period
Serial Clock (PGC) Low Time
Serial Clock (PGC) High Time
Input Data Setup Time to Serial Clock ↓
Input Data Hold Time from PGC ↓
Delay Between 4-Bit Command and
Command Operand
Delay Between 4-Bit Command Operand and
Next 4-Bit Command
Delay Between Last PGC ↓ of Command Byte
to First PGC ↑ of Read of Data Word
Delay to allow Block Programming to Occur
Delay to allow Row Erase to Occur
Delay to allow Bulk Erase to Occur
Input Data Hold Time from MCLR ↑
V
Data Out Valid from PGC ↑
Delay Between Last PGC ↓ and MCLR ↓
MCLR ↓ to V
Delay from First MCLR ↓ to First PGC ↑ for
Key Sequence on PGD
Delay from Last PGC ↓ for Key Sequence on
PGD to Second MCLR ↑
and V
DD
↑ Setup Time to MCLR ↑
SS
, respectively.
DD
Characteristic
DD
pins during programming. AV
DDCORE
/V
CAP
pin if the on-chip voltage regulator is disabled. See
Min
100
475
524
400
100
3.4
1.2
50
50
20
20
50
50
20
49
54
25
20
50
3
4
Max
1.0
DD
and AV
Units
ms
ms
ms
ms
ms
ms
ms
μs
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
μs
ns
SS
© 2009 Microchip Technology Inc.
should always be within ±0.3V
PIC18F2XJ10/PIC18F4XJ10
PIC18F2XJ11/PIC18F4XJ11/
PIC18F2XJ13/PIC18F4XJ13/
PIC18F2XJ5X/PIC18F4XJ5X
PIC18F2XJ10/PIC18F4XJ10/
PIC18F2XJ13/PIC18F4XJ13/
PIC18F2XJ53/PIC18F4XJ53
PIC18F2XJ11/PIC18F4XJ11/
PIC18F2XJ50/PIC18F4XJ50
PIC18F2XJ10/PIC18F4XJ10/
PIC18F2XJ13/PIC18F4XJ13/
PIC18F2XJ53/PIC18F4XJ53
PIC18F2XJ11/PIC18F4XJ11/
PIC18F2XJ50/PIC18F4XJ50
Conditions

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