PIC16F74-I/P Microchip Technology, PIC16F74-I/P Datasheet - Page 31

IC MCU FLASH 4KX14 A/D 40DIP

PIC16F74-I/P

Manufacturer Part Number
PIC16F74-I/P
Description
IC MCU FLASH 4KX14 A/D 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F74-I/P

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16F
No. Of I/o's
33
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
40PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
I2C/SPI/USART
On-chip Adc
8-chx8-bit
Number Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Ram Size
192 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
3.0
The FLASH Program Memory is readable during nor-
mal operation over the entire V
addressed through Special Function Registers (SFR).
Up to 14-bit numbers can be stored in memory for use
as calibration parameters, serial numbers, packed 7-bit
ASCII, etc. Executing a program memory location con-
taining data that forms an invalid instruction results in a
NOP.
There are five SFRs used to read the program and
memory. These registers are:
• PMCON1
• PMDATA
• PMDATH
• PMADR
• PMADRH
The program memory allows word reads. Program
memory access allows for checksum calculation and
reading calibration tables.
REGISTER 3-1:
 2002 Microchip Technology Inc.
READING PROGRAM MEMORY
bit 7
bit 6-1
bit 0
PMCON1 REGISTER (ADDRESS 18Ch)
Legend:
R = Readable bit
- n = Value at POR reset
bit 7
Reserved: Read as ‘1’
Unimplemented: Read as '0'
RD: Read Control bit
1 = Initiates a FLASH read, RD is cleared in hardware. The RD bit can only be set (not cleared)
0 = FLASH read completed
reserved
R-1
in software.
DD
range. It is indirectly
U-0
U-0
W = Writable bit
’1’ = Bit is set
U-0
When interfacing to the program memory block, the
PMDATH:PMDATA registers form a two-byte word,
which
PMADRH:PMADR registers form a two-byte word,
which holds the 13-bit address of the FLASH location
being accessed. These devices can have up to 8K
words of program FLASH, with an address range from
0h to 3FFFh. The unused upper bits in both the
PMDATH and PMADRH registers are not implemented
and read as “0’s”.
3.1
The address registers can address up to a maximum of
8K words of program FLASH.
When selecting a program address value, the MSByte
of the address is written to the PMADRH register and
the LSByte is written to the PMADR register. The upper
MSbits of PMADRH must always be clear.
3.2
PMCON1 is the control register for memory accesses.
The control bit RD initiates read operations. This bit
cannot be cleared, only set, in software. It is cleared in
hardware at the completion of the read operation.
holds
PMADR
PMCON1 Register
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-x
the
14-bit
U-0
PIC16F7X
data
x = Bit is unknown
U-0
DS30325B-page 29
for
reads.
R/S-0
RD
bit 0
The

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