PIC16LF873A-I/ML Microchip Technology, PIC16LF873A-I/ML Datasheet - Page 23

• Manufacturer Part Number: PIC16LF873A-I/ML
• Description: IC PIC MCU FLASH 4KX14 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF873A-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC16LF873A-I/MLR; PIC16LF873A-I/MLR

TABLE 2-1:
 2003 Microchip Technology Inc.
Address
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
Legend:
Note
Bank 2
Bank 3
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(1,3)
(3)
(1,3)
(3)
1:
2:
3:
4:
5:
INDF
TMR0
PCL
STATUS
FSR
PORTB
PCLATH
INTCON
EEDATA
EEADR
EEDATH
EEADRH
INDF
OPTION_REG
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
EECON1
EECON2
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose
contents are transferred to the upper byte of the program counter.
Bits PSPIE and PSPIF are reserved on PIC16F873A/876A devices; always maintain these bits clear.
These registers can be addressed from any bank.
PORTD, PORTE, TRISD and TRISE are not implemented on PIC16F873A/876A devices, read as ‘0’.
Bit 4 of EEADRH implemented only on the PIC16F876A/877A devices.
Name
—
—
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 31, 150
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
PORTB Data Latch when written: PORTB pins when read
Unimplemented
Unimplemented
Unimplemented
EEPROM Data Register Low Byte
EEPROM Address Register Low Byte
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 31, 150
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
EEPROM Control Register 2 (not a physical register)
Reserved; maintain clear
Reserved; maintain clear
EEPGD
RBPU
Bit 7
IRP
GIE
IRP
GIE
—
—
—
—
INTEDG
PEIE
PEIE
Bit 6
RP1
RP1
—
—
—
—
—
EEPROM Data Register High Byte
TMR0IE
TMR0IE
T0CS
Bit 5
RP0
RP0
—
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
Write Buffer for the upper 5 bits of the Program Counter
T0SE
INTE
INTE
Bit 4
—
TO
TO
—
(5)
EEPROM Address Register High Byte
WRERR
RBIE
RBIE
Bit 3
PSA
PD
PD
TMR0IF
TMR0IF
WREN
Bit 2
PS2
Z
Z
INTF
INTF
Bit 1
PS1
WR
DC
DC
PIC16F87XA
Bit 0
RBIF
RBIF
PS0
RD
C
C
xxxx xxxx 55, 150
0000 0000 30, 150
0001 1xxx 22, 150
xxxx xxxx 31, 150
xxxx xxxx 45, 150
---0 0000 30, 150
0000 000x 24, 150
xxxx xxxx 39, 151
xxxx xxxx 39, 151
--xx xxxx 39, 151
---- xxxx 39, 151
1111 1111 23, 150
0000 0000 30, 150
0001 1xxx 22, 150
xxxx xxxx 31, 150
1111 1111 45, 150
---0 0000 30, 150
0000 000x 24, 150
x--- x000 34, 151
---- ---- 39, 151
0000 0000
0000 0000
POR, BOR
DS39582B-page 21
Value on:
—
—
—
—
—
—
—
—
on page:
Details
—
—
—
—
—
—
—
—
—
—