PIC18F4585-I/PT Microchip Technology, PIC18F4585-I/PT Datasheet - Page 181

IC MCU FLASH 24KX16 44TQFP

PIC18F4585-I/PT

Manufacturer Part Number
PIC18F4585-I/PT
Description
IC MCU FLASH 24KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4585-I/PT

Core Size
8-Bit
Program Memory Size
48KB (24K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4680 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4585-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4585-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
16.4.5
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 16-6.
FIGURE 16-6:
© 2007 Microchip Technology Inc.
Forward Mode
Reverse Mode
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note
FULL-BRIDGE MODE
2: Output signal is shown as active-high.
P1A
P1B
P1C
P1D
P1A
P1B
P1C
P1D
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
FULL-BRIDGE PWM OUTPUT
(1)
(1)
Duty Cycle
Duty Cycle
PIC18F2585/2680/4585/4680
Preliminary
Period
Period
P1A, P1B, P1C and P1D outputs are multiplexed with
the
PORTD<7> data latches. The TRISD<4>, TRISD<5>,
TRISD<6> and TRISD<7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
PORTD<4>,
(1)
(1)
PORTD<5>,
DS39625C-page 179
PORTD<6>
and

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