AT89C51RE2-SLSUM Atmel, AT89C51RE2-SLSUM Datasheet - Page 32

• Manufacturer Part Number: AT89C51RE2-SLSUM
• Description: MCU 8BIT FLASH 2.7-5.5V 44-PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RE2-SLSUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Package: 44PLCC
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: SPI/TWI/UART
• Number Of Timers: 3
• Processor Series: AT89x
• Core: 8051
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89OCD-01
• Minimum Operating Temperature: - 40 C
• Cpu Family: 89C
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Boot process
Figure 12. Boot Reset vector configuration
32
EA pin
0
1
AT89C51RE2
Hardware conditions
YES
NO
The BRV2-0 bits of the FCB (see Table 20 on page 34), the EA pin value upon reset and the
presence of the external hardware conditions, allow to modify the default reset vector of the
AT89C51RE2.
The Hardware conditions (EA = 1, PSEN = 0) during the Reset falling edge force the on-chip
bootloader execution. This allows an application to be built that will normally execute the end
user’s code but can be manually forced into default ISP operation. The hardware conditions
allows to force the enter in ISP mode whatever the configurations bits.
X
BRV2-0
1 1 1
1 1 0
1 0 1
1 0 0
0 1 1
0 1 0
0 0 1
0 0 0
X
X
(FM0 at address 0x0000 with bank 0 mapped)
RM0 at address 0x0000 (ATMEL Bootloader)
RM0 at address 0x0000 (ATMEL Bootloader)
FM0 at address 0x0000 with bank0 mapped
FM0 at address 0xFFFC in Bank 0
FM0 at address 0xFFFC in Bank 1
FM0 at address 0xFFFC in Bank 2
External Code at address 0x0000
MCU reset vector
Reserved
7663E–8051–10/08