DSPIC30F6013A-30I/PF Microchip Technology, DSPIC30F6013A-30I/PF Datasheet - Page 200

• Manufacturer Part Number: DSPIC30F6013A-30I/PF
• Description: IC DSPIC MCU/DSP 132K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6013A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 132KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F6011A/6012A/6013A/6014A
FIGURE 23-13:
TABLE 23-30: DCI MODULE (AC-LINK MODE) TIMING REQUIREMENTS
DS70143D-page 200
AC CHARACTERISTICS
CS60
CS61
CS62
CS65
CS66
CS70
CS71
CS72
CS75
CS76
CS80
Note 1:
Param
SDI
(CSDI)
SDO
(CSDO)
SYNC
(COFS)
BIT_CLK
(CSCK)
No.
2:
3:
T
T
T
T
T
T
T
T
T
T
T
Symbol
These parameters are characterized but not tested in manufacturing.
These values assume BIT_CLK frequency is 12.288 MHz.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
CS80
SACL
SYNCLO
SYNCHI
SYNC
OVDACL
LSb
RACL
BCLKL
BCLKH
BCLK
HACL
FACL
CS61
BIT_CLK Low Time
BIT_CLK High Time
BIT_CLK Period
Input Setup Time to
Falling Edge of BIT_CLK
Input Hold Time from
Falling Edge of BIT_CLK
SYNC Data Output Low Time
SYNC Data Output High Time
SYNC Data Output Period
Rise Time, SYNC,
SDATA_OUT
Fall Time, SYNC, SDATA_OUT
Output valid delay from rising
edge of BIT_CLK
DCI MODULE (AC-LINK MODE) TIMING CHARACTERISTICS
CS65 CS66
MSb IN
Characteristic
MSb
CS60
(1)(2)
CS71
CS62
CS72
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
Min
36
36
—
—
—
—
—
—
—
—
—
CS76
Typ
40.7
40.7
81.4
19.5
20.8
1.3
10
10
—
—
—
(3)
Max
45
45
10
10
—
25
25
15
—
—
—
CS76
CS21
-40°C ≤ T
-40°C ≤ T
CS75
Units
ns
ns
ns
ns
ns
μs
μs
μs
ns
ns
ns
© 2008 Microchip Technology Inc.
CS20
A
A
Bit clock is input
Note 1
Note 1
Note 1
C
C
≤ +85°C for Industrial
≤ +125°C for Extended
LOAD
LOAD
CS70
Conditions
= 50 pF, V
= 50 pF, V
CS75
DD
DD
LSb
= 5V
= 5V