DSPIC30F6013A-30I/PF Microchip Technology, DSPIC30F6013A-30I/PF Datasheet - Page 225

• Manufacturer Part Number: DSPIC30F6013A-30I/PF
• Description: IC DSPIC MCU/DSP 132K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6013A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 132KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPENDIX A:
Revision A (January 2005)
Original data sheet for dsPIC30F6011A, 6012A, 6013A
and 6014A devices.
Revision B (September 2005)
Revision B of this data sheet reflects these changes:
• 12-Bit ADC allows up to 200 ksps sampling rate
• FRC Oscillator revised to allow tuning in ±0.75%
• Revised electrical characteristics:
Revision C (October 2006)
Revision C of this data sheet reflects these changes:
• BSRAM and SSRAM SFRs added for Data RAM
• Added INTTREG register (see Section 5.0
• Revised I
• Base Instruction CP1 removed from instruction
• Revised electrical characteristics:
© 2008 Microchip Technology Inc.
(see Section 19.6 “Selecting the ADC Conver-
sion Clock” and Section 19.7 “ADC Speeds”),
increments (see Section 20.2.5 “Fast RC Oscil-
lator (FRC)” and Table 20-4).
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- Brown-Out Reset (BOR) (see Table 23-11)
- External Clock Timing Requirements (see
- PLL Clock Timing Specification (V
- PLL Jitter (seeTable 23-16)
- Internal FRC Jitter Accuracy and Drift (see
- 12-Bit ADC Module Specifications (see
- 12-Bit ADC Conversion Timing Requirements
protection (see Section 3.2.7 “Data Ram Protec-
tion Feature”)
“Interrupts”)
set (see Table 21-2)
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- I/O Pin Input Specifications (see Table 23-8)
- Brown-Out Reset (BOR) (see Table 23-11)
- Watchdog Timer (see Table 23-21)
Table 23-14)
5.5 V) (see Table 23-15)
Table 23-18)
Table 23-38)
(see Table 23-39)
2
C Slave Addresses (see Table 15-1)
IDLE
IDLE
) (see Table 23-6)
) (see Table 23-6)
REVISION HISTORY
dsPIC30F6011A/6012A/6013A/6014A
DD
DD
) (see Table 23-5)
) (see Table 23-5)
PD
PD
) (seeTable 23-7)
) (seeTable 23-7)
DD
= 2.5-
Revision F (July 2008)
This revision reflects these updates:
• Added FUSE Configuration Register (FICD)
• Removed erroneous statement regarding genera-
• Electrical Specifications:
• Preliminary marking removed from document
• Additional minor corrections throughout the
details (see Section 20.8 “Device Configuration
Registers” and Table 20-8)
tion of CAN receive errors (see Section 17.4.5
“Receive Errors”)
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention Volt-
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated I/O Pin characteristics parameters
- Removed parameters DC27a, DC27b,
- Removed parameters CS77 and CS78
- Updated Min and Max values and Conditions
footer
document
DO16, DO20, and DO26 (see Table 23-9)
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table 23-39)
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table 23-19)
age) has been updated to include a Min value
(see Table 23-4)
has been updated to include Min and Max
values and the Typ value has been removed
(see Table 23-12)
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table 23-18)
has been expanded to reflect multiple Min
and Max values for different temperatures
(see Table 23-18)
DI19 and DI29 (see Table 23-8)
DC47a, and DC47b (references to I
MIPs @ 3.3V) in Table 23-5 and Table 23-6
(references to T
Table 23-30
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see Table 23-21)
FACL
and T
PDU
RACL
timing parame-
DS70143D-page 225
@ 3.3V) in
DD
, 20