AT91SAM9R64-CU Atmel, AT91SAM9R64-CU Datasheet - Page 649

• Manufacturer Part Number: AT91SAM9R64-CU
• Description: MCU ARM9 64K SRAM 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9R64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 49
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 144LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

39. LCD Controller (LCDC)
39.1
6289C–ATARM–28-May-09
Description
The LCD Controller (LCDC) consists of logic for transferring LCD image data from an external
display buffer to an LCD module with integrated common and segment drivers.
The LCD Controller supports single and double scan monochrome and color passive STN LCD
modules and single scan active TFT LCD modules. On monochrome STN displays, up to 16
gray shades are supported using a time-based dithering algorithm and Frame Rate Control
(FRC) method. This method is also used in color STN displays to generate up to 4096 colors.
The LCD Controller has a display input buffer (FIFO) to allow a flexible connection of the exter-
nal AHB master interface, and a lookup table to allow palletized display configurations.
The LCD Controller is programmable in order to support many different requirements such as
resolutions up to 2048 x 2048; pixel depth (1, 2, 4, 8, 16, 24 bits per pixel); data line width (4, 8,
16 or 24 bits) and interface timing.
The LCD Controller is connected to the ARM Advanced High Performance Bus (AHB) as a mas-
ter for reading pixel data. However, the LCD Controller interfaces with the AHB as a slave in
order to configure its registers.
AT91SAM9R64/RL64 Preliminary
649