AT91SAM9261B-CU Atmel, AT91SAM9261B-CU Datasheet - Page 21

• Manufacturer Part Number: AT91SAM9261B-CU
• Description: MCU ARM9 ULTRA LOW PWR 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 240MHz
• Total Internal Ram Size: 160KB
• # I/os (max): 96
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.2/1.8/3.3V
• Operating Supply Voltage (max): 1.32/1.95/3.6V
• Operating Supply Voltage (min): 1.08/1.65/2.7/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 217
• Package Type: LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 160 KB
• Interface Type: JTAG,SPI, SSC, TWI, UART
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 96
• Ram Memory Size: 160KB
• Cpu Speed: 190MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

8.1.3
8.2
6062LS–ATARM–23-Mar-09
External Memories
ETM
™
Memories
The eight ETM9 Medium+ memory map decoder inputs are connected to custom address
decoders and the resulting memory mapping is summarized in
Table 8-6.
The external memories are accessed through the External Bus Interface (Bus Matrix Slave 3).
Refer to the memory map in
Product Resource
SRAM
SRAM
ROM
ROM
External Bus Interface
External Bus Interface
User Peripherals
System Peripherals
ETM9 Memory Mapping
Area
Internal
Internal
Internal
Internal
External
External
Internal
Internal
Figure 8-1 on page
Access Type
Data
Fetch
Data
Fetch
Data
Fetch
Data
Data
AT91SAM9261 Preliminary
16.
0x0000 0000
Start Address
0x0000 0000
0x0040 0000
0x0040 0000
0x1000 0000
0x1000 0000
0xF000 0000
0xFFFF C000
Table
8-6.
0x002F FFFF
0x002F FFFF
0x004F FFFF
0x004F FFFF
End Address
0x8FFF FFFF
0x8FFF FFFF
0xFFFF BFFF
0xFFFF FFFF
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