AT91SAM9261B-CU Atmel, AT91SAM9261B-CU Datasheet - Page 24

• Manufacturer Part Number: AT91SAM9261B-CU
• Description: MCU ARM9 ULTRA LOW PWR 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 240MHz
• Total Internal Ram Size: 160KB
• # I/os (max): 96
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.2/1.8/3.3V
• Operating Supply Voltage (max): 1.32/1.95/3.6V
• Operating Supply Voltage (min): 1.08/1.65/2.7/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 217
• Package Type: LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 160 KB
• Interface Type: JTAG,SPI, SSC, TWI, UART
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 96
• Ram Memory Size: 160KB
• Cpu Speed: 190MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

9.2
9.3
9.4
9.5
24
Reset Controller
Shutdown Controller
General-purpose Backup Registers
Clock Generator
AT91SAM9261 Preliminary
Figure 9-2.
• Based on two Power-on-Reset cells
• Status of the last reset
• Controls the internal resets and the NRST pin output
• Shutdown and Wake-up logic:
• Four 32-bit general-purpose backup registers
• Embeds the Low-power 32768 Hz Slow Clock Oscillator
• Embeds the Main Oscillator
• Embeds Two PLLs
• Provides SLCK, MAINCK, PLLACK and PLLBCK.
– Either cold reset, first reset, soft reset, user reset, watchdog reset, wake-up reset
– Software programmable assertion of the SHDN pin
– Deassertion Programmable on a WKUP pin level change or on alarm
– Provides the permanent Slow Clock to the system
– Oscillator bypass feature
– Supports 3 to 20 MHz crystals
– Outputs 80 to 240 MHz clocks
– Integrates an input divider to increase output accuracy
– 1 MHz minimum input frequency
Clock Generator Block Diagram
XOUT32
PLLRCA
PLLRCB
XIN32
XOUT
XIN
Clock Generator
Management
Slow Clock
Controller
Oscillator
Oscillator
Divider A
Divider B
Status
PLL and
PLL and
Power
Main
Control
Slow Clock
SLCK
Main Clock
MAINCK
PLLA Clock
PLLACK
PLLB Clock
PLLBCK
6062LS–ATARM–23-Mar-09