LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 143
LPC1343FBD48,151
Manufacturer Part Number
LPC1343FBD48,151
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Specifications of LPC1343FBD48,151
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
40
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
42
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
Development Tools By Supplier
OM11039, OM11040, OM11046, OM11048
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1000
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4945
935289652151
935289652151
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1343FBD48,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1343FBD48,151
Manufacturer:
NXP/恩智浦
Quantity:
20 000
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NXP Semiconductors
UM10375
User manual
9.11.8 Get Device Status (Command: 0xFE, Data: read 1 byte)
9.11.9 Get Error Code (Command: 0xFF, Data: read 1 byte)
Table 174. Set Device Status command description
The Get Device Status command returns the Device Status Register. Reading the device
status returns 1 byte of data. The bit field definition is same as the Set Device Status
Register as shown in
Remark: To ensure correct operation, the DEV_STAT bit of USBDevIntSt must be cleared
before executing the Get Device Status command.
Different error conditions can arise inside the SIE. The Get Error Code command returns
the last error code that occurred. The 4 least significant bits form the error code.
Bit Symbol
4
7:5 -
RST
Value Description
0
1
All information provided in this document is subject to legal disclaimers.
Table
Bus Reset bit. On a bus reset, the device will automatically go to
the default state. In the default state:
Note: Bus resets are ignored when the device is not connected
(CON=0).
This bit is cleared when read.
This bit is set when the device receives a bus reset. A DEV_STAT
interrupt is generated.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
•
•
•
•
•
•
•
Rev. 2 — 7 July 2010
Device is unconfigured.
Will respond to address 0.
Control endpoint will be in the Stalled state.
Data toggling is reset for all endpoints.
All buffers are cleared.
There is no change to the endpoint interrupt status.
DEV_STAT interrupt is generated.
174.
Chapter 9: LPC13xx USB device controller
UM10375
© NXP B.V. 2010. All rights reserved.
145 of 333
Reset
value
0
NA
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