LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 27
LPC1343FBD48,151
Manufacturer Part Number
LPC1343FBD48,151
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Specifications of LPC1343FBD48,151
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
40
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
42
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
Development Tools By Supplier
OM11039, OM11040, OM11046, OM11048
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1000
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4945
935289652151
935289652151
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1343FBD48,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1343FBD48,151
Manufacturer:
NXP/恩智浦
Quantity:
20 000
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NXP Semiconductors
UM10375
User manual
3.5.24 USB clock source update enable register
3.5.25 USB clock divider register
3.5.26 WDT clock source select register
Table 28.
This register updates the clock source of the USB with the new input clock after the
USBCLKSEL register has been written to. In order for the update to take effect, first write
a zero to the USBCLKUEN register and then write a one to USBCLKUEN.
Remark: When switching clock sources, both clocks must be running before the clock
source is updated.
Table 29.
This register allows the USB clock usb_clk to be divided to 48 MHz. The usb_clk can be
shut down by setting the DIV bits to 0x0.
Table 30.
This register selects the clock source for the watchdog timer. The WDTCLKUEN register
(see
Remark: When switching clock sources, both clocks must be running before the clock
source is updated.
Bit
1:0
31:2
Bit
0
31:1
Bit
7:0
31:8
Section
Symbol
SEL
-
Symbol
ENA
-
Symbol
DIV
-
USB clock source select register (USBCLKSEL, address 0x4004 80C0) bit
description
USB clock source update enable register (USBCLKUEN, address 0x4004 80C4) bit
description
USB clock divider register (USBCLKDIV, address 0x4004 80C8) bit description
3.5.27) must be toggled from LOW to HIGH for the update to take effect.
All information provided in this document is subject to legal disclaimers.
Value
00
01
10
11
Value
0
1
to
255
-
-
Value
0
1
-
Rev. 2 — 7 July 2010
Description
USB clock source
USB PLL out
Main clock
Reserved
Reserved
Reserved
Description
USB clock divider values
Disable
Divide by 1
...
Divide by 255
Reserved
Description
Enable USB clock source update
No change
Update clock source
Reserved
Chapter 3: LPC13xx System configuration
UM10375
© NXP B.V. 2010. All rights reserved.
Reset value
0x0
0x00
28 of 333
Reset
value
0x00
0x00
Reset
value
0x01
0x00
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