LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 52

• Manufacturer Part Number: LPC1343FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4945; 935289652151

5.1 How to read this chapter
5.2 Introduction
5.3 Features
5.4 Interrupt sources
UM10375
User manual
Interrupts 47 and 48 in
interrupts are reserved on parts LPC1311/13.
The implementation of start logic wake-up interrupts depends on how many PIO port pins
are available (see
interrupt 38 are available.
The Nested Vectored Interrupt Controller (NVIC) is an integral part of the Cortex-M3. The
tight coupling to the CPU allows for low interrupt latency and efficient processing of late
arriving interrupts.
Refer to the Cortex-M3 Technical Reference Manual for details of NVIC operation.
Table 61
may have one or more interrupt lines to the Vectored Interrupt Controller. Each line may
represent more than one interrupt source. There is no significance or priority about what
line is connected where except for certain standards from ARM.
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UM10375
Chapter 5: LPC13xx Interrupt controller
Rev. 2 — 7 July 2010
Nested Vectored Interrupt Controller that is an integral part of the ARM Cortex-M3.
Tightly coupled interrupt controller provides low interrupt latency.
Controls system exceptions and peripheral interrupts.
In the LPC13xx, the NVIC supports up to 56 vectored interrupts.
8 programmable interrupt priority levels with hardware priority level masking.
Relocatable vector table.
Software interrupt generation.
lists the interrupt sources for each peripheral function. Each peripheral device
All information provided in this document is subject to legal disclaimers.
Section
Table 61
Rev. 2 — 7 July 2010
3.1). For HVQFN packages only wake-up interrupts 0 to 24 and
are available on parts LPC1342/43 with USB only. These
© NXP B.V. 2010. All rights reserved.
User manual
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