LPC3131FET180,551 NXP Semiconductors, LPC3131FET180,551 Datasheet - Page 10

• Manufacturer Part Number: LPC3131FET180,551
• Description: IC ARM9 MCU 180MHZ 180-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC3000r

Specifications of LPC3131FET180,551

• Package / Case: 180-TFBGA
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, PWM, WDT
• Program Memory Type: ROMless
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC31
• Core: ARM926EJ-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 192 KB
• Interface Type: I2C/I2S/UART/USB
• Maximum Clock Frequency: 180 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC3131-PL
• Development Tools By Supplier: OM11028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4850 - KIT EVAL FOR LPC313X568-4062 - DEBUGGER J-LINK JTAG568-4061 - DEBUGGER U-LINK2 JTAG FOR NXP
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4697; 935288014551; LPC3131FET180-S

NXP Semiconductors
Table 4.
Pin names with prefix m are multiplexed pins. See
LPC3130_3131
Preliminary data sheet
Pin name
I
I2SRX_DATA0
I2SRX_DATA1
I2SRX_BCK0
I2SRX_BCK1
I2SRX_WS0
I2SRX_WS1
I
mI2STX_DATA0
mI2STX_BCK0
mI2STX_WS0
mI2STX_CLK0
I2STX_DATA1
I2STX_BCK1
I2STX_WS1
General Purpose I/O (IOCONFIG module)
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
mGPIO5
mGPIO6
mGPIO7
mGPIO8
mGPIO9
mGPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
2
2
S/Digital Audio Input
S/Digital Audio Output
[6]
[6]
[6]
[4]
[4]
[4]
[4]
[4]
[4]
Pin description
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
BGA
ball
M10
G14
N10
F14
P11
F13
M13
M12
M11
N14
F12
E14
G10
K10
J10
L14
B11
C11
B6
A6
A5
B5
C5
A4
H13
H10
J12
J14
J13
J11
K12
K14
H11
K13
Digital
I/O
level
[1]
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
SUP3
All information provided in this document is subject to legal disclaimers.
Application
function
DI / GPIO
DI / GPIO
DIO / GPIO
DIO / GPIO
DIO / GPIO
DIO / GPIO
DO / GPIO
DO / GPIO
DO / GPIO
DO / GPIO
DO / GPIO
DO / GPIO
DO / GPIO
GPIO
GPIO
GPIO
GPIO
GPI
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Rev. 1.04 — 27 May 2010
Table 10
Pin
state
after
reset
I
I
I
I
I
I
O
O
O
O
O
O
O
I:PD
I:PD
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
for pin function selection of multiplexed pins.
Low-cost, low-power ARM926EJ-S microcontrollers
[2]
Cell type
[3]
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO4
DIO4
DIO4
DIO4
DIO4
DIO4
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
DIO1
Description
I
I
I
I
I
I
I
I
I
I
I
I
I
General Purpose I/O Pin 0 (Mode pin 0)
General Purpose I/O Pin 1 (Mode pin 1)
General Purpose I/O Pin 2 (Mode pin 2)
General Purpose I/O Pin 3
General Purpose Input Pin 4
General Purpose I/O Pin 5
General Purpose I/O Pin 6
General Purpose I/O Pin 7
General Purpose I/O Pin 8
General Purpose I/O Pin 9
General Purpose I/O Pin 10
General Purpose I/O Pin 11
General Purpose I/O Pin 12
General Purpose I/O Pin 13
General Purpose I/O Pin 14
General Purpose I/O Pin 15
General Purpose I/O Pin 16
General Purpose I/O Pin 17
General Purpose I/O Pin 18
General Purpose I/O Pin 19
General Purpose I/O Pin 20
2
2
2
2
2
2
2
2
2
2
2
2
2
S Serial Data Receive Input
S Serial Data Receive Input
S Bitclock
S Bitclock
S Word select
S Word select
S Serial Data Transmit Output
S Bitclock
S Word select
S Serial Clock
S Serial Data Transmit Output
S Bitclock
S Word select
LPC3130/3131
© NXP B.V. 2010. All rights reserved.
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