Z8F022APB020SG Zilog, Z8F022APB020SG Datasheet - Page 11
Z8F022APB020SG
Manufacturer Part Number
Z8F022APB020SG
Description
IC ENCORE XP MCU FLASH 2K 8DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F08200100KIT.pdf
(264 pages)
Specifications of Z8F022APB020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
Z8F022Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
512 KB
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4089
Z8F022APB020SG
Z8F022APB020SG
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PS022517-0508
Braces
The curly braces { }, indicate a single register or bus created by concatenating some com-
bination of smaller registers, buses, or individual bits.
•
Parentheses
The parentheses ( ), indicate an indirect register address lookup.
•
Parentheses/Bracket Combinations
The parentheses ( ), indicate an indirect register address lookup and the square brackets,
[ ], indicate a register or bus.
•
Use of the Words Set, Reset and Clear
The word set implies that a register bit or a condition contains a logical 1. The words reset
or clear imply that a register bit or a condition contains a logical 0. When either of these
terms is followed by a number, the word logical cannot be included; however, it is
implied.
Notation for Bits and Similar Registers
A field of bits within a register is designated as: Register[n:n].
•
Use of the Terms LSB, MSB, lsb, and msb
In this document, the terms LSB and MSB, when appearing in upper case, mean least
significant byte and most significant byte, respectively. The lowercase forms, lsb and msb,
mean least significant bit and most significant bit, respectively.
Use of Initial Uppercase Letters
Initial uppercase letters designate settings and conditions in general text.
•
•
Example: The 12-bit register address {
hexadecimal value (
(RP) and Working Register R1.
12-bit register, and R1[3:0] is the least significant nibble of the 12-bit register.
Example: (R1) is the memory location referenced by the address contained in the
Working Register R1.
Example: Assume PC[15:0] contains the value
contents of the memory location at address
Example: ADDR[15:0] refers to bits 15 through bit 0 of the Address.
Example 1: The receiver forces the SCL line to Low.
Example 2: The Master generates a STOP condition to abort the transfer.
0H
) and two 4-bit register values taken from the Register Pointer
0H
is the most significant nibble (4-bit value) of the
0H
, RP[7:4], R1[3:0]} is composed of a 4-bit
1234h
1234h
.
Z8 Encore! XP
. (PC [15:0]) then refers to the
Product Specification
®
F0822 Series
Introduction
xi
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