Z8F022APB020SG Zilog, Z8F022APB020SG Datasheet - Page 114

• Manufacturer Part Number: Z8F022APB020SG
• Description: IC ENCORE XP MCU FLASH 2K 8DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F022APB020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Processor Series: Z8F022Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 512 KB
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4089; Z8F022APB020SG

Table 53. UART Receive Data Register (U0RXD)
Table 54. UART Status 0 Register (U0STAT0)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
UART Receive Data Register
UART Status 0 Register
RDA
7
7
Data bytes received through the RXDx pin are stored in the UART Receive Data Register
(Table
with the Write-only UART Transmit Data Register.
RXD—Receive Data
UART receiver data byte from the RXDx pin
The UART Status 0 and Status 1 registers
the current UART operating configuration and status.
RDA—Receive Data Available
This bit indicates that the UART Receive Data Register has received data. Reading the
UART Receive Data Register clears this bit.
0 = The UART Receive Data Register is empty.
1 = There is a byte in the UART Receive Data Register.
PE—Parity Error
This bit indicates that a parity error has occurred. Reading the UART Receive Data Regis-
ter clears this bit.
0 = No parity error has occurred.
1 = A parity error has occurred.
OE—Overrun Error
This bit indicates that an overrun error has occurred. An overrun occurs when new data is
received and the UART Receive Data Register has not been read. If the RDA bit is reset to
53). The Read-only UART Receive Data Register shares a Register File address
PE
6
6
OE
0
5
5
FE
4
4
F40H
F41H
RXD
R
R
X
(Table 54
BRKD
3
3
Universal Asynchronous Receiver/Transmitter
and
Z8 Encore! XP
TDRE
Table 55
2
2
Product Specification
1
on page 102) identify
TXE
1
1
®
F0822 Series
CTS
X
0
0
101