Z8F022APB020SG Zilog, Z8F022APB020SG Datasheet - Page 90
Z8F022APB020SG
Manufacturer Part Number
Z8F022APB020SG
Description
IC ENCORE XP MCU FLASH 2K 8DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F08200100KIT.pdf
(264 pages)
Specifications of Z8F022APB020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
Z8F022Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
512 KB
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4089
Z8F022APB020SG
Z8F022APB020SG
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PS022517-0508
Reading the Timer Count Values
CAPTURE/COMPARE Mode
In CAPTURE/COMPARE mode, the timer begins counting on the first external Timer
Input transition. The required transition (rising edge or falling edge) is set by the TPOL bit
in the Timer Control Register. The timer input is the system clock.
Every subsequent desired transition (after the first) of the Timer Input signal captures the
current count value. The Capture value is written to the Timer PWM High and Low Byte
Registers. When the Capture event occurs, an interrupt is generated, the count value in the
Timer High and Low Byte Registers is reset to
If no Capture event occurs, the timer counts up to the 16-bit Compare value stored in the
Timer Reload High and Low Byte registers. Upon reaching the Compare value, the timer
generates an interrupt, the count value in the Timer High and Low Byte Registers is reset
to
Follow the steps below for configuring a timer for CAPTURE/COMPARE mode and initi-
ating the count:
1. Write to the Timer Control Register to:
2. Write to the Timer High and Low Byte registers to set the starting count value
3. Write to the Timer Reload High and Low Byte registers to set the Compare value
4. If desired, enable the timer interrupt and set the timer interrupt priority by writing to
5. Configure the associated GPIO port pin for the Timer Input alternate function
6. Write to the Timer Control Register to enable the timer
7. Counting begins on the first appropriate transition of the Timer Input signal.
In CAPTURE/COMPARE mode, the elapsed time from timer start to Capture event is
calculated using the following equation:
The current count value in the timers can be read while counting (enabled). This capability
has no effect on timer operation. When the timer is enabled and the Timer High Byte
Capture Elapsed Time (s)
0001H
–
–
–
–
(typically
the relevant interrupt registers
No interrupt is generated by this first edge
Disable the timer
Configure the timer for CAPTURE/COMPARE mode
Set the prescale value
Set the Capture edge (rising or falling) for the Timer Input
and counting resumes.
0001H
)
=
(
--------------------------------------------------------------------------------------------------------- -
Capture Value Start Value
System Clock Frequency (Hz)
–
0001H
and counting resumes.
Z8 Encore! XP
)xPrescale
Product Specification
®
F0822 Series
Timers
77
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