Z8F022APB020SG Zilog, Z8F022APB020SG Datasheet - Page 163

• Manufacturer Part Number: Z8F022APB020SG
• Description: IC ENCORE XP MCU FLASH 2K 8DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F022APB020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Processor Series: Z8F022Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 512 KB
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4089; Z8F022APB020SG

Table 77. ADC Control Register (ADCCTL)
ADC Control Register Definitions
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
ADC Control Register
CEN
7
The ADC Control Register selects the analog input channel and initiates the
analog-to-digital conversion.
CEN—Conversion Enable
0 = Conversion is complete. Writing a 0 produces no effect. The ADC automatically
1 = Begin conversion. Writing a 1 to this bit starts a conversion. If a conversion is
Reserved—Must be 0
VREF
0 = Internal reference generator enabled. The
1 = Internal voltage reference generator disabled. An external voltage reference must
CONT
0 = SINGLE-SHOT conversion. ADC data is output once at completion of the
1 = Continuous conversion. ADC data updated every 256 system clock cycles.
ANAIN—Analog Input Select
These bits select the analog input for conversion. Not all Port pins in this list are available
in all packages for Z8 Encore! XP
information regarding the Port pins available with each package style.
Do not enable unavailable analog inputs.
0000 = ANA0
0001 = ANA1
0010 = ANA2
0011 = ANA3
0100 = ANA4
capacitively coupled to analog ground (AVSS).
5129 system clock cycles.
clears this bit to 0 when a conversion has been completed.
already in progress, the conversion restarts. This bit remains 1 until the conversion
be provided through the
is complete.
0
Reserved
6
VREF
5
1
VREF
CONT
®
pin.
4
F0822 Series. See
F70H
R/W
VREF
3
pin must be left unconnected or
Signal and Pin Descriptions
Z8 Encore! XP
2
0
ANAIN[3:0]
Product Specification
Analog-to-Digital Converter
1
®
F0822 Series
for
0
150