Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 310

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

Table 158. Option Bits At Program Memory Address 0000H
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
Note: U = Unchanged by Reset. R/W = Read/Write.
Program Memory Address 0000H
R/W
OSC_SEL[1:0]
U
7
Option bits in this space are altered to change the chip configuration at reset.
OSC_SEL[1:0]—Oscillator mode selection
00 = On-chip oscillator configured for use with external RC networks (<4 MHz).
01 = Minimum power for use with very low frequency crystals (32 kHz to 1.0 MHz).
10 = Medium power for use with medium frequency crystals or ceramic resonators 
(0.5 MHz to 10.0 MHz).
11 = Maximum power for use with high frequency crystals (8.0 MHz to 20.0 MHz). This
setting is the default for unprogrammed (erased) Flash.
WDT_RES—WDT Reset
0 = WDT time-out generates an interrupt request. Interrupts must be globally enabled for
the ZNEO CPU to acknowledge the interrupt request.
1 = WDT time-out causes a Short Reset. This setting is the default for unprogrammed
(erased) Flash.
WDT_AO—WDT always on 
0 = WDT is automatically enabled after reset. The WDT oscillator is disabled by clearing
the WDTEN bit in the OSCCTL register.
1 = WDT is enabled upon execution of the
disabled by clearing the WDTEN bit in the OSCCTL register.
VBO_AO—Voltage Brownout protection always on 
0 = Voltage Brownout protection is disabled in STOP mode to reduce total power 
consumption.
1 = Voltage Brownout protection is always enabled, including during STOP mode. This
setting is the default for unprogrammed (erased) Flash.
DBGUART—Debug UART enable 
0 = The Debug UART option is enabled.
1 = The Debug UART option is disabled.
R/W
U
6
WDT_RES WDT_AO
R/W
U
5
P R E L I M I N A R Y
Program Memory 0000H
R/W
U
4
WDT
VBO_AO
R/W
instruction. The WDT oscillator is
U
3
DBGUART
R/W
U
2
Product Specification
ZNEO
FWP
R/W
U
1
Z16F Series
Option Bits
R/W
RP
U
0
294