EZ80F91NA050SG Zilog, EZ80F91NA050SG Datasheet - Page 133
EZ80F91NA050SG
Manufacturer Part Number
EZ80F91NA050SG
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050SG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-LBGA
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
0 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3870
EZ80F91NA050SG
EZ80F91NA050SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91NA050SG
Manufacturer:
ZILOG
Quantity:
20 000
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PS019215-0910
TMR3_CTL Write
(Timer Enable)
System Clock
Clock Enable
T3 Count
Interrupt
Request
TMRx_RR_H and TMRx_RR_L. Downcounting continues on the next clock edge and
the timer continues to count until disabled. An example of the timer operating in
CONTINUOUS mode is displayed in
Table
Table 51. Example: PRT CONTINUOUS Mode Parameters
Timer Interrupts
The terminal count flag (TMRx_IIR[EOC]) is set to 1 whenever the timer reaches
its end-of-count value in SINGLE PASS mode, or when the timer reloads the start value in
CONTINUOUS mode. The terminal count flag is only set when the timer reaches
(or reloads) from
with the value
The CPU is programmed to poll the EOC bit for the time-out event. Alternatively, an inter-
rupt service request signal is sent to the CPU by setting the TMRx_IER[EOC] bit to 1.
Parameter
Timer Enable
Reload
Prescaler Divider = 4
CONTINUOUS Mode
End of Count Interrupt Enable
Timer Reload Value
Figure 28. Example: PRT CONTINUOUS Mode Operation
51.
X
0000h
0001h
4
, which selects the maximum time-out period.
. The timer interrupt flag is not set to 1 when the timer is loaded
3
Control Register(s)
TMR
TMR
TMR
TMR
TMR
{TMR
2
Figure
x
x
x
x
x
x
_CTL[TIM_EN]
_CTL[RLD]
_CTL[CLK_DIV]
_CTL[TIM_CONT]
_IER[IRQ_EOC_EN]
_RR_H, TMR
28. Timer register information is listed in
1
4
x
_RR_L}
Programmable Reload Timers
3
Product Specification
Value
1
1
00b
1
1
0004h
2
eZ80F91 MCU
1
0000h
0000h
,
124
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