EZ80F91NA050SG Zilog, EZ80F91NA050SG Datasheet - Page 147
EZ80F91NA050SG
Manufacturer Part Number
EZ80F91NA050SG
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050SG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-LBGA
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
0 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3870
EZ80F91NA050SG
EZ80F91NA050SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91NA050SG
Manufacturer:
ZILOG
Quantity:
20 000
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PS019215-0910
Timer Reload Register—Low Byte
The Timer x Reload Register—Low Byte (see
(LSB) of the 2-byte timer reload value. In CONTINUOUS mode, the timer reload value is
reloaded into the timer on end-of-count. When the reload bit (TMRx_CTL[RLD]) is set to
1 forcing the reload function, the timer reload value is written to the timer on the next ris-
ing edge of the clock.
This register shares its address with the corresponding timer data register.
Table 59. Timer Reload Register—Low Byte
= 0068h, TMR2_RR_L = 0072h, TMR3_RR_L = 0077h)
Bit
Reset
CPU Access
Note: W = Write Only.
Bit
Position
[7:0]
TMR_RR_L
Value
00h–FFh
W
7
0
Description
These bits represent the Low byte of the 2-byte timer
reload value, {TMR
is bit 7 of the 16-bit timer reload value. Bit 0 is bit 0 (lsb) of
the 16-bit timer reload value.
W
6
0
W
5
0
Table
x
_RR_H[7:0], TMR
(TMR0_RR_L = 0063h, TMR1_RR_L
W
4
0
59) stores the least-significant byte
W
3
0
Programmable Reload Timers
Product Specification
W
2
0
x
_RR_L[7:0]}. Bit 7
eZ80F91 MCU
W
1
0
W
0
0
138
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