C8051T614-GQ Silicon Laboratories Inc, C8051T614-GQ Datasheet - Page 147

IC 8051 MCU 8K BYTE-PROG 32-LQFP

C8051T614-GQ

Manufacturer Part Number
C8051T614-GQ
Description
IC 8051 MCU 8K BYTE-PROG 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051T61xr
Datasheets

Specifications of C8051T614-GQ

Program Memory Type
OTP
Program Memory Size
8KB (8K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
29
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051FT610DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
Package
32LQFP
Device Core
8051
Family Name
C8051T61x
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1441

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T614-GQ
Manufacturer:
Silicon
Quantity:
1 500
Part Number:
C8051T614-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051T614-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
1100
1000 1
1110
Values Read
0
0
0
0 X
0
0
0 X
0
1
A master START was gener-
ated.
A master data or address byte
was transmitted; NACK
received.
A master data or address byte
was transmitted; ACK
received.
A master data byte was
received; ACK requested.
Current SMbus State
Table 22.4. SMBus Status Decoding
Rev 1.0
Load slave address + R/W into
SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and start
another transfer.
Send repeated START.
Switch to Master Receiver Mode
(clear SI without writing new data
to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last byte,
and send STOP.
Send NACK to indicate last byte,
and send STOP followed by
START.
Send ACK followed by repeated
START.
Send NACK to indicate last byte,
and send repeated START.
Send ACK and switch to Master
Transmitter Mode (write to
SMB0DAT before clearing SI).
Send NACK and switch to Mas-
ter Transmitter Mode (write to
SMB0DAT before clearing SI).
C8051T610/1/2/3/4/5/6/7
Typical Response Options
Values to
0
1
0
0
0
1
1
0
0
0
1
1
1
0
0
Write
0 X 1100
0 X
1 X
0 X 1100
1 X
1 X
0 X
0 X 1000
0 1
1 0
1 0
0 1
0 0
0 1
0 0
1000
1100
1100
1110
1110
1110
1110
1110
147

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