C8051T614-GQ Silicon Laboratories Inc, C8051T614-GQ Datasheet - Page 34

IC 8051 MCU 8K BYTE-PROG 32-LQFP

C8051T614-GQ

Manufacturer Part Number
C8051T614-GQ
Description
IC 8051 MCU 8K BYTE-PROG 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051T61xr
Datasheets

Specifications of C8051T614-GQ

Program Memory Type
OTP
Program Memory Size
8KB (8K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
29
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051FT610DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
Package
32LQFP
Device Core
8051
Family Name
C8051T61x
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1441

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T614-GQ
Manufacturer:
Silicon
Quantity:
1 500
Part Number:
C8051T614-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051T614-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051T610/1/2/3/4/5/6/7
Table 7.4. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Table 7.5. Internal Voltage Regulator Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Table 7.6. EPROM Electrical Characteristics
34
Parameter
Input Voltage Range
Bias Current
Parameter
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
V
V
Missing Clock Detector 
Timeout
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Parameter
EPROM Size
EPROM Size
Write Cycle Time (per Byte)
Programming Voltage (V
Notes:
DD
DD
DD
DD
1. 512 bytes at location 0x3E00 to 0x3FFF are not available for program storage
2. Refer to device errata for details
POR Ramp Time
Monitor Threshold (V
Monitor Turn-on Time
Monitor Supply Current
PP
RST
)
2
Normal Mode
)
C8051T610/1/6/7
C8051T612/3/4/5
Date Code 0935 and Later
Date Code prior to 0935
I
V
RST = 0.0 V
Time from last system clock
rising edge to reset initiation
Delay between release of any
reset source and code 
execution at location 0x0000
V
OL
DD
DD
= 8.5 mA, 
= 1.8 V to 3.6 V
= V
Conditions
RST
Conditions
Conditions
- 0.1 V
Rev 1.0
16384
8192
0.75 x V
5.75
6.25
Min
105
Min
500
1.7
15
1
Min
1.8
DD
6.325
Typ
155
6.0
1.75
Typ
625
25
50
20
Typ
30
Max
6.25
205
6.5
Max
750
0.6
0.6
1.8
50
60
30
Max
1
3.6
50
Units
bytes
bytes
µs
Units
V
V
Units
V
µA
ms
µA
µA
µs
µs
µs
µs
V
V
V
V
DD

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