MC908JL16CFJE Freescale Semiconductor, MC908JL16CFJE Datasheet - Page 134

IC MCU 16K FLASH 8MHZ 32-LQFP

MC908JL16CFJE

Manufacturer Part Number
MC908JL16CFJE
Description
IC MCU 16K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908JL16CFJE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
HC08JL
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908JL16E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
26
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
DEMO908JL16E - BOARD DEMO FOR MC908JL16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter (ADC)
9.8.2 ADC10 Result High Register (ADRH)
This register holds the MSB’s of the result and is updated each time a conversion completes. All other
bits read as 0s. Reading ADRH prevents the ADC10 from transferring subsequent conversion results into
the results registers until ADRL is read. If ADRL is not read until the after next conversion is completed,
then the intermediate conversion results will be lost. In 8-bit mode, this register contains no interlocking
with ADRL.
9.8.3 ADC10 Result Low Register (ADRL)
This register holds the LSB’s of the result. This register is updated each time a conversion completes.
Reading ADRH prevents the ADC10 from transferring subsequent conversion results into the results
registers until ADRL is read. If ADRL is not read until the after next conversion is completed, then the
intermediate conversion results will be lost. In 8-bit mode, there is no interlocking with ADRH.
134
Address:
Address:
Address:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 9-5. ADC10 Data Register High (ADRH), 10-Bit Mode
Figure 9-4. ADC10 Data Register High (ADRH), 8-Bit Mode
$003D
$003D
$003E
Bit 7
Bit 7
Bit 7
AD7
R
R
R
R
R
R
0
0
0
0
0
Figure 9-6. ADC10 Data Register Low (ADRL)
= Reserved
= Reserved
= Reserved
AD6
R
R
R
6
0
0
6
0
0
6
0
MC68HC908JL16 Data Sheet, Rev. 1.1
AD5
R
R
R
5
0
0
5
0
0
5
0
AD4
R
R
R
4
0
0
4
0
0
4
0
AD3
R
R
R
3
0
0
3
0
0
3
0
AD2
R
R
R
2
0
0
2
0
0
2
0
AD9
AD1
R
R
R
1
0
0
1
0
1
0
Freescale Semiconductor
Bit 0
Bit 0
AD8
Bit 0
AD0
R
R
R
0
0
0
0

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