MC908AP32CFAE Freescale Semiconductor, MC908AP32CFAE Datasheet - Page 229

IC MCU 32K FLASH 8MHZ 48-LQFP

MC908AP32CFAE

Manufacturer Part Number
MC908AP32CFAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908AP32CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908AP32CFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Use this formula to calculate the SPI baud rate:
where:
CGMOUT = base clock output of the clock generator module (CGM)
BD = baud rate divisor
13.13.3 SPI Data Register
The SPI data register consists of the read-only receive data register and the write-only transmit data
register. Writing to the SPI data register writes data into the transmit data register. Reading the SPI data
register reads data from the receive data register. The transmit data and receive data registers are
separate registers that can contain different values. (See
R7–R0/T7–T0 — Receive/Transmit Data Bits
Freescale Semiconductor
Address:
Do not use read-modify-write instructions on the SPI data register since the
register read is not the same as the register written.
Reset:
Read:
Write:
SPR1 and SPR0
$0012
Bit 7
R7
T7
00
01
10
11
Baud rate
Table 13-4. SPI Master Baud Rate Selection
Figure 13-15. SPI Data Register (SPDR)
R6
T6
6
MC68HC908AP Family Data Sheet, Rev. 4
=
CGMOUT
------------------------- -
2 BD
R5
T5
5
×
NOTE
Unaffected by reset
R4
T4
4
Baud Rate Divisor (BD)
Figure
R3
T3
3
128
32
13-2.)
2
8
R2
T2
2
R1
T1
1
Bit 0
R0
T0
I/O Registers
227

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