MC908GR60ACFAE Freescale Semiconductor, MC908GR60ACFAE Datasheet - Page 203

• Manufacturer Part Number: MC908GR60ACFAE
• Description: IC MCU 60K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR60ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$0010
$0011
$0012
Addr.
RECEIVER/ERROR CPU INTERRUPT REQUEST
SPI Status and Control
TRANSMITTER CPU INTERRUPT REQUEST
Register Name
SPMSTR
SPI Control Register
DIVIDER
CLOCK
Register (SPSCR)
SPI Data Register
BUSCLK
See page 217.
See page 218.
See page 220.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
÷ 128
SPE
÷ 32
(SPCR)
(SPDR)
÷ 2
÷ 8
SPR1
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
SELECT
CLOCK
Figure 15-2. SPI Module Block Diagram
Figure 15-3. SPI I/O Register Summary
SPR0
SPRIE
SPRF
Bit 7
R7
T7
R
0
0
7
= Reserved
CONTROL
ERRIE
TRANSMIT DATA REGISTER
RECEIVE DATA REGISTER
R6
T6
6
R
6
0
0
SPI
SHIFT REGISTER
INTERNAL BUS
5
4
SPMSTR
OVRF
R5
T5
3
5
1
0
MODF
OVRF
SPRF
SPTE
SPMSTR
2
1
MODFEN
MODF
CPOL
Unaffected by reset
ERRIE
SPTIE
SPRIE
SPE
R4
T4
0
CLOCK
4
0
0
LOGIC
CPHA
= Unimplemented
CPHA
SPTE
CPOL
R3
T3
SPWOM
3
1
1
M
S
MODFEN
SPWOM
CONTROL
LOGIC
R2
T2
PIN
2
0
0
Functional Description
SPR1
SPE
R1
T1
1
0
0
MISO
MOSI
SPSCK
SS
SPTIE
SPR0
Bit 0
R0
T0
0
0
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