HD64F7045F28V Renesas Electronics America, HD64F7045F28V Datasheet - Page 47

• Manufacturer Part Number: HD64F7045F28V
• Description: IC SH2 MCU FLASH 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD64F7045F28V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note:
4.3
The instruction format table, table 4.8, refers to the source operand and the destination operand.
The meaning of the operand depends on the instruction code. The symbols are used as follows:
Addressing
Mode
PC relative
addressing
(cont)
Immediate
addressing
xxxx: Instruction code
mmmm: Source register
nnnn: Destination register
iiii: Immediate data
dddd: Displacement
* Applies to the SH-2 and SH-DSP. This addressing mode is not supported by the SH-1.
Instruction Format
Instruction
Format
Rn*
#imm:8
#imm:8
#imm:8
Effective Addresses Calculation
The effective address is the register PC plus Rn.
The 8-bit immediate data (imm) for the TST, AND,
OR, and XOR instructions are zero-extended.
The 8-bit immediate data (imm) for the MOV, ADD,
and CMP/EQ instructions are sign-extended.
Immediate data (imm) for the TRAPA instruction is
zero-extended and is quadrupled.
PC
R0
+
Rev. 5.00 Jun 30, 2004 page 31 of 512
PC + R0
Section 4 Instruction Features
REJ09B0171-0500O
Formula
PC + Rn
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