PIC12F519-I/P Microchip Technology, PIC12F519-I/P Datasheet

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PIC12F519-I/P

Manufacturer Part Number
PIC12F519-I/P
Description
IC PIC MCU FLASH 1KX12 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F519-I/P

Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
8-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Interface Type
USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Package
8PDIP
Device Core
PIC
Family Name
PIC12
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14AC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F519-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC12F519
Data Sheet
8-Pin, 8-Bit Flash Microcontroller
*8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and
foreign patents and applications may be issued or pending.
Preliminary
© 2007 Microchip Technology Inc.
DS41319A

Related parts for PIC12F519-I/P

PIC12F519-I/P Summary of contents

Page 1

... Flash Microcontroller *8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and foreign patents and applications may be issued or pending. © 2007 Microchip Technology Inc. PIC12F519 Data Sheet Preliminary DS41319A ...

Page 2

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 3

... RC oscillator - EXTRC: External low-cost RC oscillator - XT: Standard crystal/resonator - LP: Power-saving, low-frequency crystal © 2007 Microchip Technology Inc. PIC12F519 Low-Power Features/CMOS Technology: • Standby Current: - 100 nA @ 2.0V, typical • Operating Current μ kHz, 2.0V, typical - 170 μ MHz, 2.0V, typical • Watchdog Timer Current μ ...

Page 4

... PIC12F519 FIGURE 1: PIC12F519 8-PIN PDIP, SOIC, MSOP, 2X3 DFN DIAGRAM PDIP, SOIC, MSOP RB5/OSC1/CLKIN RB4/OSC2 RB3/MCLR/V DFN RB5/OSC1/CLKIN RB4/OSC2 RB3/MCLR/V Program Memory Device Flash (words) SRAM (bytes) PIC12F519 1024 41 DS41319A-page RB0/ICSPDAT 2 7 RB1/ICSPCLK 3 6 RB2/T0CKI RB0/ICSPDAT 3 6 RB1/ICSPCLK RB2/T0CKI Data Memory ...

Page 5

... Table of Contents General Description .............................................................................................................................................................................. 5 PIC12F519 Device Varieties ................................................................................................................................................................ 7 Architectural Overview .......................................................................................................................................................................... 9 Memory Organization .......................................................................................................................................................................... 13 Flash Data Memory ............................................................................................................................................................................. 21 I/O Port ................................................................................................................................................................................................ 25 Timer0 Module and TMR0 Register .................................................................................................................................................... 29 Special Features Of The CPU ............................................................................................................................................................ 35 Instruction Set Summary ..................................................................................................................................................................... 49 Development Support ......................................................................................................................................................................... 57 Electrical Characteristics ..................................................................................................................................................................... 61 DC and AC Characteristics Graphs and Charts .................................................................................................................................. 73 Packaging Information ........................................................................................................................................................................ 75 Index ................................................................................................................................................................................................... 81 The Microchip Web Site ...

Page 6

... PIC12F519 NOTES: DS41319A-page 4 Preliminary © 2007 Microchip Technology Inc. ...

Page 7

... In-Circuit Serial Programming™ Number of Instructions Packages The PIC12F519 device has Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC12F519 device uses serial programming with data pin RB0 and clock pin RB1. © 2007 Microchip Technology Inc. ...

Page 8

... PIC12F519 NOTES: DS41319A-page 6 Preliminary © 2007 Microchip Technology Inc. ...

Page 9

... A variety of packaging options are available. Depending on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC12F519 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 Quick Turn Programming (QTP) ...

Page 10

... PIC12F519 NOTES: DS41319A-page 8 Preliminary © 2007 Microchip Technology Inc. ...

Page 11

... PIC12F519 device simple, yet efficient. In addition, the learning curve is reduced significantly. The PIC12F519 device contains an 8-bit ALU and working register. The ALU is a general purpose arith- metic unit. It performs arithmetic and Boolean functions between data in the working register and any register file. © ...

Page 12

... PIC12F519 FIGURE 3-1: PIC12F519 ARCHITECTURAL BLOCK DIAGRAM 11 Flash Program Memory Flash Data Memory 64x8 Program 12 Bus Instruction Reg Direct Addr 5 8 Device Reset Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2 Internal RC OSC MCLR DS41319A-page 10 8 Data Bus Program Counter RAM ...

Page 13

... TABLE 3-2: PIC12F519 PINOUT DESCRIPTION Name Function Type RB0/ICSPDAT RB0 I/O ICSPDAT I/O RB1/ICSPCLK RB1 I/O ICSPCLK I RB2/T0CKI RB2 I/O T0CKI I RB3/MCLR/V RB3 I PP MCLR RB4/OSC2 RB4 I/O OSC2 O RB5/OSC1/CLKIN RB5 I/O OSC1 I CLKIN Legend Input Output, I/O = Input/Output Power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage © ...

Page 14

... PIC12F519 3.1 Clocking Scheme/Instruction Cycle The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC is incremented every Q1 and the instruction is fetched from program memory and latched into the instruction register in Q4 decoded and executed during the following Q1 through Q4 ...

Page 15

... Register (FSR). 4.1 Program Memory Organization for the PIC12F519 The PIC12F519 device has an 11-bit Program Counter (PC) capable of addressing program memory space. Program memory is partitioned into user memory, data memory and configuration memory spaces. The user memory space is the on-chip user program memory ...

Page 16

... I/O register (port) and the File Select Register (FSR). In addition, the EECON, EEDATA and EEADR registers provide for interface with the Flash data memory. The PIC12F519 register file is composed of 10 Special Function Registers and 41 General Purpose Registers. 4.2.1 GENERAL PURPOSE REGISTER ...

Page 17

... Z CAL4 CAL3 CAL2 CAL1 RB5 RB4 RB3 RB2 — FREE WRERR WREN EEADR5 EEADR4 EEADR3 EEADR2 Preliminary PIC12F519 Value on Bit 1 Bit 0 Power-on Reset TRIS1 TRIS0 --11 1111 1111 1111 xxxx xxxx xxxx xxxx 1111 1111 DC C 0001 1xxx 110x xxxx CAL0 — ...

Page 18

... PIC12F519 4.3 STATUS register This register contains the arithmetic status of the ALU, the Reset status and the page preselect bit. The STATUS register can be the destination for any instruction, as with any other register. If the STATUS register is the destination for an instruction that affects the bits, then the write to these three bits is disabled ...

Page 19

... A Reset sets the OPTION<7:0> bits. Note: If the T0SC bit is set to ‘1’, it will override the TRIS function on the T0CKI pin. W-1 W-1 T0SE PSA x = Bit is unknown ‘0’ = Bit is cleared WDT Rate 128 256 1 : 128 Preliminary PIC12F519 W-1 W-1 W-1 PS2 PS1 PS0 bit 0 DS41319A-page 17 ...

Page 20

... PIC12F519 4.5 OSCCAL Register The Oscillator Calibration (OSCCAL) register is used to calibrate the 8 MHz internal oscillator macro. It contains 7 bits of calibration that uses a two’s complement scheme for controlling the oscillator speed. See Register 4-3 for details. REGISTER 4-3: OSCCAL: OSCILLATOR CALIBRATION REGISTER ...

Page 21

... Stack The PIC12F519 device has a two-deep, 12-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incremented by one, into Stack Level 1 ...

Page 22

... PIC12F519 4.8 Indirect Data Addressing: INDF and FSR Registers The INDF register is not a physical register. Addressing INDF actually addresses the register whose address is contained in the FSR register (FSR is a pointer). This is indirect addressing. Reading INDF itself indirectly (FSR = 0) will produce 00h. Writing to the INDF Register indirectly results in a no-operation (although Status bits may be affected) ...

Page 23

... Flash data memory and read the program memory. When code-protected, the device programmer can no longer access data or program memory. R/W-x R/W-x R/W-x EEDATA4 EEDATA3 EEDATA2 x = Bit is unknown ‘0’ = Bit is cleared Preliminary PIC12F519 R/W-x R/W-x EEDATA1 EEDATA0 bit 0 DS41319A-page 21 ...

Page 24

... PIC12F519 REGISTER 5-2: EEADR: FLASH ADDRESS REGISTER U-0 U-0 R/W-x — — EEADR5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-6 Unimplemented: Do not use bit 5-0 EEADR<5:0>: 6-bits of address to be read from/written to data Flash REGISTER 5-3: ...

Page 25

... If the WR bit is not set in the instruction cycle after the WREN bit is set, the WREN bit will be cleared in hard- ware. This sequence is to prevent an accidental write to the Flash memory. Preliminary PIC12F519 ;SWITCH TO BANK 1 ;LOAD ADDRESS TO SFR ; SELECT ERASE ; ENABL FLASH PROG’ING ; INITITATE ERASE ...

Page 26

... PIC12F519 EXAMPLE 5-3: DATA MEMORY WRITE BSF FSR,5 ;SWITCH TO BANK 1 MOVLW EE_ADR_WRITE ;LOAD ADDRESS TO ;WRITE MOVWF EEADR ;INTO EEADR ;REGISTER MOVLW EE_DATA_TO_WRITE;LOAD DATA TO MOVWF EEDATA ;INTO EEDATA ;REGISTER BSF EECON,WREN ;ENABLE WRITES BSF EECON,WR ;START WRITE ;SEQUENCE NOP ;WAIT AS READ ;INSTRUCTION ...

Page 27

... The TRIS registers are “write-only” and are set (output drivers disabled) upon Reset. Note: If the T0CS bit is set to ‘1’, it will override the TRIS function on the T0CKI pin. RB1 Weak Pull-up RB3 Weak Pull-up Yes Yes Preliminary PIC12F519 (1) RB4 Weak Pull-up No DS41319A-page 25 ...

Page 28

... PIC12F519 REGISTER 6-1: PORTB: PORTB REGISTER U-0 U-0 R/W-x — — RB5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-6 Unimplemented: Read as ‘1’ bit 5-0 RB<5:0>: PORTB I/O Pin bits 1 = Port pin is >V min. ...

Page 29

... Reg D TRIS Latch TRIS ‘f’ CK Reset Note 1: See Table 3-2 for buffer type. Bit 4 Bit 3 Bit 2 Bit 1 RB4 RB3 RB2 RB1 TRIS4 TRIS3 TRIS2 TRIS1 Preliminary PIC12F519 PIC12F519 EQUIVALENT CIRCUIT FOR A SINGLE I/O PIN I/O pin (1) RD Port Value on Value on all ...

Page 30

... PIC12F519 6.4 I/O Programming Considerations 6.4.1 BIDIRECTIONAL I/O PORTS Some instructions operate internally as read followed by write operations. The BCF and BSF instructions, for example, read the entire port into the CPU, execute the bit operation and re-write the result. Caution must be used when these instructions are applied to a port where one or more pins are used as input/outputs ...

Page 31

... PSA (1) PS2, PS1, PS0 ( NT0 Write TMR0 Read TMR0 Read TMR0 executed reads NT0 reads NT0 Preliminary PIC12F519 Data Bus 8 Sync with TMR0 Reg Internal Clocks PSout Sync NT0 + 1 NT0 + 2 Read TMR0 Read TMR0 Read TMR0 reads NT0 + 1 reads NT0 ...

Page 32

... PIC12F519 FIGURE 7-3: TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1 (Program Counter) PC – Instruction MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W Fetch Timer0 Instruction Executed TABLE 7-1: REGISTERS ASSOCIATED WITH TIMER0 Address Name Bit 7 01h TMR0 Timer0 – 8-bit Real-Time Clock/Counter ...

Page 33

... Timer0 module is actually incremented. Figure 7-4 shows the delay from the external clock edge to the timer incrementing ( (Duration OSC OSC max. OSC Preliminary PIC12F519 Small pulse misses sampling Therefore, the error OSC DS41319A-page 31 ...

Page 34

... PIC12F519 7.2 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer (WDT), respectively (see Section 8.6 “Watch- dog Timer (WDT)”). For simplicity, this counter is being referred to as “prescaler” throughout this data sheet. Note: The prescaler may be used by either the Timer0 module or the WDT, but not both ...

Page 35

... Timer PSA WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. © 2007 Microchip Technology Inc Sync Cycles T0CS PSA 8-bit Prescaler 8 8-to-1 MUX PS<2:0> MUX PSA WDT Time-Out Preliminary PIC12F519 (1) Data Bus 8 2 TMR0 Reg DS41319A-page 33 ...

Page 36

... PIC12F519 NOTES: DS41319A-page 34 Preliminary © 2007 Microchip Technology Inc. ...

Page 37

... LP crystal option saves power. A set of Configuration bits are used to select various options. 8.1 Configuration Bits The PIC12F519 Configuration Words consist of 12 bits. Configuration bits can be programmed to select various device configurations. Two bits are for the selection of the oscillator type; one bit is the Watchdog Timer enable bit, one bit is the MCLR enable bit and one bit is for code protection (Register 8-1) ...

Page 38

... XT oscillator with 18 ms DRT 10 = INTOSC with 1 ms DRT 11 = EXTRC with 1 ms DRT Note 1: Refer to the “PIC12F519 Memory Programming Specification”, DS41316 to determine how to access the Configuration Word. 2: DRT length ( ms function of clock mode selection the responsibility of the application designer to ensure the use of either 18 ms (nominal) DRT or the 1 ms (nominal) DRT will result in acceptable operation. Refer to Section 11.1 “ ...

Page 39

... Oscillator Configurations 8.2.1 OSCILLATOR TYPES The PIC12F519 device can be operated four different oscillator modes. The user can program using the Configuration bits (FOSC<1:0>), to select one of these modes: • LP: Low-Power Crystal • XT: Crystal/Resonator • INTRC: Internal 4 MHz or 8 MHz Oscillator • EXTRC: External Resistor/Capacitor 8 ...

Page 40

... The user also needs to take into account variation due to tolerance of external R and C components used. Figure 8-5 shows how the R/C combination is con- nected to the PIC12F519 device. For R below 3.0 kΩ, the oscillator operation may become unstable, or stop completely. For very high R (e.g., 1 MΩ ...

Page 41

... The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later. For the PIC12F519 device, only bits <7:1> of OSCCAL are used for calibration. See Register 4-3 for more information. Note: The bit 0 of the OSCCAL register is unimplemented and should be written as ‘ ...

Page 42

... PIC12F519 TABLE 8-3: RESET CONDITIONS FOR REGISTERS Register Address W — INDF 00h TMR0 01h PCL 02h STATUS 03h FSR 04h OSCCAL 05h PORTB 06h OPTION — TRIS — EECON 21h EEDATA 25h EEADR 26h Legend unchanged unknown, – = unimplemented bit, read as ‘0’ value depends on condition. ...

Page 43

... RBWU RB3/MCLR/V MCLRE 8.4 Power-on Reset (POR) The PIC12F519 device incorporates an on-chip Power-on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper oper- DD ation ...

Page 44

... PIC12F519 FIGURE 8-7: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT V DD Power-up Detect RB3/MCLR/V PP MCLRE WDT Reset WDT Time-out Pin Change Sleep Wake-up on pin Change Reset FIGURE 8-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW MCLR Internal POR DRT Time-out Internal Reset FIGURE 8-9: ...

Page 45

... Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 ≥ V © 2007 Microchip Technology Inc. V1 TDRT time-out expires long before V DRT DD Preliminary PIC12F519 ): SLOW V RISE DD DD has reached its final min. DD DS41319A-page 43 ...

Page 46

... PIC12F519 8.5 Device Reset Timer (DRT) On the PIC12F519 device, the DRT runs any time the device is powered up. DRT runs from Reset and varies based on oscillator selection and Reset type (see Table 8-5). The DRT operates on an internal RC oscillator. The processor is kept in Reset as long as the DRT is active. ...

Page 47

... Microchip Technology Inc Postscaler Postscaler 8-to-1 MUX PSA To Timer0 0 1 MUX PSA WDT Time-out Bit 4 Bit 3 Bit 2 Bit 1 T0SE PSA PS2 PS1 Preliminary PIC12F519 PS<2:0> (Figure 7-3) Value on Value on all Bit 0 POR, BOR other Resets PS0 1111 1111 1111 1111 DS41319A-page 45 ...

Page 48

... PIC12F519 8.7 Time-out Sequence, Power-down and Wake-up from Sleep Status Bits (TO, PD, RBWUF) The TO, PD and (RBWUF) bits in the STATUS register can be tested to determine if a Reset condition has been caused by a power-up condition, a MCLR or Watchdog Timer (WDT) Reset. TABLE 8-7: TO/PD/(RBWUF) STATUS ...

Page 49

... The first 64 locations and the last location (OSCCAL) can be read, regardless of the code protection bit setting. The last memory location can be read regardless of the code protection bit setting on the PIC12F519 device. 8.10 ID Locations Four memory locations are designated as ID locations where users can store checksum or other code identification numbers ...

Page 50

... PIC12F519 NOTES: DS41319A-page 48 Preliminary © 2007 Microchip Technology Inc. ...

Page 51

... INSTRUCTION SET SUMMARY The PIC12F519 instruction set is highly orthogonal and is comprised of three basic categories. • Byte-oriented operations • Bit-oriented operations • Literal and control operations Each PIC12F519 instruction is a 12-bit word divided into an opcode, which specifies the instruction type, and one or more operands which further specify the operation of the instruction ...

Page 52

... PIC12F519 TABLE 9-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW – Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...

Page 53

... If bit ‘b’ in register ‘f’ is ‘0’, then the next instruction is skipped. If bit ‘b’ is ‘0’, then the next instruc- tion fetched during the current instruction execution is discarded, and a NOP is executed instead, making this a two-cycle instruction. Preliminary PIC12F519 f,b f,b DS41319A-page 51 ...

Page 54

... PIC12F519 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b 0 ≤ f ≤ 31 Operands: 0 ≤ b < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...

Page 55

... IORLW Inclusive OR literal with W Syntax: [ label ] 0 ≤ k ≤ 255 Operands: (W) .OR. (k) → (W) Operation: Status Affected: Z Description: The contents of the W register are OR’ed with the eight-bit literal ‘k’. The result is placed in the W register. Preliminary PIC12F519 INCF f,d INCFSZ f,d IORLW k DS41319A-page 53 ...

Page 56

... PIC12F519 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d 0 ≤ f ≤ 31 Operands: d ∈ [0,1] (W).OR. (f) → (dest) Operation: Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...

Page 57

... Operands: Operation: Status Affected: C, DC, Z Description: SWAPF Syntax: Operands: Operation: Status Affected: None Description: Preliminary PIC12F519 Enter SLEEP Mode [label ] SLEEP None 00h → WDT; 0 → WDT prescaler; 1 → TO; 0 → PD Time-out Status bit (TO) is set. The Power-down Status bit (PD) is cleared ...

Page 58

... PIC12F519 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands (W) → TRIS register f Operation: Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register. XORLW Exclusive OR literal with W Syntax: [label ] XORLW k 0 ≤ k ≤ 255 Operands: (W) .XOR. k → (W) ...

Page 59

... Mixed assembly and C - Machine code MPLAB IDE supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. This eliminates the learning curve when upgrading to tools with increased flexibility and power. Preliminary PIC12F519 ® DS41319A-page 57 ...

Page 60

... PIC12F519 10.2 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for all PIC MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging ...

Page 61

... PC via an RS-232 or USB cable. The MPLAB PM3 has high-speed communications and optimized algorithms for quick programming of large memory devices and incorporates an SD/MMC card for file storage and secure data applications. Preliminary PIC12F519 development tool protocol, offers cost- and V ...

Page 62

... PIC12F519 10.11 PICSTART Plus Development Programmer The PICSTART Plus Development Programmer is an easy-to-use, low-cost, prototype programmer. It connects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus Development Programmer supports most PIC devices in DIP packages pins. ...

Page 63

... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2007 Microchip Technology Inc. ............................................................................... -0. )...................................................................................................................± ...........................................................................................................±20 mA > – ∑ DIS Preliminary PIC12F519 + 0.3V ∑ {( ∑(V – DS41319A-page 61 ...

Page 64

... PIC12F519 PIC12F519 VOLTAGE-FREQUENCY GRAPH, -40°C ≤ T FIGURE 11-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 FIGURE 11-2: MAXIMUM OSCILLATOR FREQUENCY TABLE LP XT EXTRC INTOSC 0 DS41319A-page 62 INTOSC ONLY Frequency (MHz) 200 kHz 4 MHz Frequency (MHz) Preliminary ≤ +125° MHz ...

Page 65

... DC CHARACTERISTICS: PIC12F519 (Industrial) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3,4) D010 I Supply Current DD D020 I Power-down Current PD (5) D022 ...

Page 66

... PIC12F519 11.2 DC CHARACTERISTICS: PIC12F519 (Extended) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3,4) D010 I Supply Current DD D020 I Power-down Current PD (5) ...

Page 67

... Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the PIC12F519 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level ...

Page 68

... PIC12F519 TABLE 11-2: PULL-UP RESISTOR RANGES Temperature V (Volts) DD (°C) RB0/RB1 2.0 – 125 5.5 – 125 RB3 2.0 – 125 5.5 – 125 DS41319A-page 66 Min Typ 73K 105K 73K 113K 82K 123K 86K 132K 15K 21K 15K 22K 19K 26K 23K ...

Page 69

... Timing Parameter Symbology and Load Conditions – PIC12F519 The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings CLKOUT cy Cycle time drt Device Reset Timer io I/O port Uppercase letters and their meanings: ...

Page 70

... PIC12F519 TABLE 11-1: EXTERNAL CLOCK TIMING REQUIREMENTS AC CHARACTERISTICS Param Sym Characteristic No External CLKIN Frequency OSC Oscillator Frequency 1 T External CLKIN Period OSC (2) Oscillator Period 2 T Instruction Cycle Time CY 3 TosL, Clock in (OSC1) Low or High TosH Time 4 TosR, Clock in (OSC1) Rise or Fall ...

Page 71

... Microchip Technology Inc 20, 21 -40°C ≤ T ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) A range is described in DD Characteristic (2), (3) (3) (3) Preliminary PIC12F519 Q3 New Value (1) Min Typ Max Units — — 100* ns TBD — — ns TBD — — ns — ...

Page 72

... Timer Reset (1) I/O pin Note 1: I/O pins must be taken out of High-impedance mode by enabling the output drivers in software. 2: Runs in MCLR or WDT Reset only in XT and LP. TABLE 11-3: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC12F519 AC CHARACTERISTICS Param Sym Characteristic No MCLR Pulse Width (low) ...

Page 73

... Standard Operating Conditions (unless otherwise specified) Operating Temperature -40°C ≤ T ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) A Operating Voltage V range is described in DD Section TABLE 11-1: “DC CHARACTERISTICS: PIC12F519 (Industrial, Extended)” Min Typ No Prescaler 0 20* CY With Prescaler 10* No Prescaler 0 ...

Page 74

... PIC12F519 NOTES: DS41319A-page 72 Preliminary © 2007 Microchip Technology Inc. ...

Page 75

... DC AND AC CHARACTERISTICS GRAPHS AND CHARTS Graphs and charts are not available at this time. © 2007 Microchip Technology Inc. Preliminary PIC12F519 DS41319A-page 73 ...

Page 76

... PIC12F519 NOTES: DS41319A-page 74 Preliminary © 2007 Microchip Technology Inc. ...

Page 77

... For PIC device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2007 Microchip Technology Inc. Example 12F519-I /P017 0610 Example 12F519-I /SN0610 017 Example 519/MS 610017 Example Preliminary PIC12F519 ) e 3 DS41319A-page 75 ...

Page 78

... PIC12F519 8-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width ...

Page 79

... A2 1.25 A1 0.10 E 6.00 BSC E1 3.90 BSC D 4.90 BSC h 0.25 L 0.40 L1 1.04 REF 0° c 0.17 b 0.31 5° 5° Preliminary PIC12F519 c NOM MAX 8 – 1.75 – – – 0.25 – 0.50 – 1.27 – 8° – 0.25 – 0.51 – 15° – 15° ...

Page 80

... PIC12F519 8-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N NOTE Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length ...

Page 81

... MIN NOM N e 0.50 BSC A 0.80 0.90 A1 0.00 0.02 A3 0.20 REF D 2.00 BSC E 3.00 BSC D2 1.30 E2 1.50 b 0.18 0.25 L 0.30 0.40 K 0.20 Preliminary PIC12F519 NOTE MAX 8 1.00 0.05 – 1.75 – 1.90 0.30 0.50 – – Microchip Technology Drawing C04-123B DS41319A-page 79 ...

Page 82

... PIC12F519 APPENDIX A: REVISION HISTORY Revision A (May 2007) Original release of this document. DS41319A-page 80 Preliminary © 2007 Microchip Technology Inc. ...

Page 83

... MPLINK Object Linker/MPLIB Object Librarian .................. 58 O OPTION Register................................................................ 17 OSC selection..................................................................... 35 OSCCAL Register............................................................... 18 Oscillator Configurations..................................................... 37 Oscillator Types HS............................................................................... 37 LP ............................................................................... 37 RC .............................................................................. 37 XT ............................................................................... 37 P PIC12F519 Device Varieties................................................. 7 PICSTART Plus Development Programmer....................... 60 POR Device Reset Timer (DRT) ................................... 35, 44 PD............................................................................... 46 TO............................................................................... 46 PORTB ............................................................................... 25 Power-down Mode.............................................................. 46 Prescaler ............................................................................ 32 Program Counter ................................................................ cycles .............................................................................. Oscillator ...

Page 84

... PIC12F519 W Wake-up from Sleep ........................................................... 46 Watchdog Timer (WDT) ................................................ 35, 44 Period.......................................................................... 44 Programming Considerations ..................................... 44 WWW Address.................................................................... 83 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41319A-page 82 Preliminary © 2007 Microchip Technology Inc. ...

Page 85

... Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com Preliminary PIC12F519 should contact their distributor, DS41319A-page 83 ...

Page 86

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC12F519 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

Page 87

... SOIC, 8-LD (Pb-free) Pattern: Special Requirements Note: Tape and Reel available for only the following packages: SOIC, MC and MSOP. © 2007 Microchip Technology Inc. XXX Examples: Pattern a) PIC12F519-I/P package (Pb-free) b) PIC12F519T-I/SL = Industrial temp., SOIC Preliminary PIC12F519 . = Industrial temp., PDIP DS41319A-page 85 ...

Page 88

... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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