PIC12F519-I/P Microchip Technology, PIC12F519-I/P Datasheet - Page 16

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PIC12F519-I/P

Manufacturer Part Number
PIC12F519-I/P
Description
IC PIC MCU FLASH 1KX12 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F519-I/P

Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
8-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Interface Type
USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Package
8PDIP
Device Core
PIC
Family Name
PIC12
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14AC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F519-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC12F519
4.2
Data memory is composed of registers or bytes of
SRAM. Therefore, data memory for a device is speci-
fied by its register file. The register file is divided into
two functional groups: Special Function Registers
(SFR) and General Purpose Registers (GPR).
The Special Function Registers include the TMR0 reg-
ister, the Program Counter (PCL), the STATUS register,
the I/O register (port) and the File Select Register
(FSR). In addition, the EECON, EEDATA and EEADR
registers provide for interface with the Flash data
memory.
The PIC12F519 register file is composed of 10 Special
Function Registers and 41 General Purpose Registers.
4.2.1
The General Purpose Register file is accessed, either
directly or indirectly, through the File Select Register
(FSR). See Section 4.8 “Indirect Data Addressing:
INDF and FSR Registers”.
FIGURE 4-2:
DS41319A-page 14
File Address
Note 1: Not a physical register.
FSR<5>
0Ah
0Fh
1Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
Data Memory (SRAM and FSRs)
GENERAL PURPOSE REGISTER
FILE
General
Purpose
Registers
General
Purpose
Registers
OSCCAL
STATUS
PORTB
INDF
TMR0
Bank 0
FSR
PCL
0
REGISTER FILE MAP
(1)
Address map
back to
addresses
in Bank 0
General
Purpose
Registers
EEDATA
STATUS
EECON
INDF
EEADR
PCL
FSR
Bank 1
1
(1)
20h
30h
2Fh
3Fh
Preliminary
4.2.2
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
SPECIAL FUNCTION REGISTERS
© 2007 Microchip Technology Inc.

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