PIC12F519-I/P Microchip Technology, PIC12F519-I/P Datasheet - Page 48

• Manufacturer Part Number: PIC12F519-I/P
• Description: IC PIC MCU FLASH 1KX12 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F519-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.5KB (1K x 12)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Interface Type: USB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• Package: 8PDIP
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14AC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F519
8.7
The TO, PD and (RBWUF) bits in the STATUS register
can be tested to determine if a Reset condition has
been caused by a power-up condition, a MCLR or
Watchdog Timer (WDT) Reset.
TABLE 8-7:
8.8
A device may be powered down (Sleep) and later
powered up (wake-up from Sleep).
8.8.1
The Power-down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low or high-impedance).
For lowest current consumption while powered down,
the T0CKI input should be at V
RB3/MCLR/V
MCLR is enabled.
DS41319A-page 46
Legend: u = unchanged
Note 1:
RBWUF
Note:
0
0
0
0
0
1
Time-out Sequence, Power-down
and Wake-up from Sleep Status
Bits (TO, PD, RBWUF)
Power-down Mode (Sleep)
The TO, PD and RBWUF bits maintain
their status (u) until a Reset occurs. A
low-pulse on the MCLR input does not
change the TO, PD and RBWUF Status
bits.
SLEEP
A Reset generated by a WDT time-out
does not drive the MCLR pin low.
TO
PP
0
0
1
1
u
1
pin must be at a logic high level if
TO/PD/(RBWUF) STATUS
AFTER RESET
PD
0
u
0
1
u
0
WDT wake-up from Sleep
WDT time-out (not from
Sleep)
MCLR wake-up from Sleep
Power-up
MCLR not during Sleep
Wake-up from Sleep on pin
change
Reset Caused By
DD
or V
SS
and the
Preliminary
8.8.2
The device can wake-up from Sleep through one of
the following events:
1.
2.
3.
These events cause a device Reset. The TO, PD and
RBWUF bits can be used to determine the cause of
device Reset. The TO bit is cleared if a WDT time-out
occurred (and caused wake-up). The PD bit, which is
set on power-up, is cleared when SLEEP is invoked.
The RBWUF bit indicates a change in state while in
Sleep at pins RB0, RB1 and RB3 (since the last file or
bit operation on RB port).
The WDT is cleared when the device wakes from
Sleep, regardless of the wake-up source.
Note:
An external Reset input on RB3/MCLR/V
when configured as MCLR.
A Watchdog Timer Time-out Reset (if WDT was
enabled).
A change on input pin RB0, RB1 and RB3 when
wake-up on change is enabled.
WAKE-UP FROM SLEEP
Caution: Right before entering Sleep,
read the input pins. When in Sleep, wake
up occurs when the values at the pins
change from the state they were in at the
last reading. If a wake-up on change
occurs and the pins are not read before
re-entering Sleep, a wake-up will occur
immediately even if no pins change while
in Sleep mode.
© 2007 Microchip Technology Inc.
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pin,