PIC18F2431-I/SP Microchip Technology, PIC18F2431-I/SP Datasheet - Page 163
![IC PIC MCU FLASH 8KX16 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2431-I/SP
Manufacturer Part Number
PIC18F2431-I/SP
Description
IC PIC MCU FLASH 8KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(40 pages)
8.PIC18F2431-ISP.pdf
(396 pages)
Specifications of PIC18F2431-I/SP
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18F2431-ISP PDF datasheet #8
- Current page: 163 of 392
- Download datasheet (4Mb)
17.2.2
Position measurement resolution depends on how
often the Position Counter register, POSCNT, is
incremented. There are two QEI Update modes to
measure the rotor’s position: QEI x2 and QEI x4.
TABLE 17-4:
17.2.2.1
QEI x2 Update mode is selected by setting the QEI
Mode Select bits (QEIM<2:0>) to ‘001’ or ‘010’. In this
mode, the QEI logic detects every edge on the QEA
input only. Every rising and falling edge on the QEA
signal clocks the position counter.
The position counter can be reset by either an input on
the INDX pin (QEIM<2:0> = 001), or by a period match,
even when the POSCNT register pair equals MAXCNT
(QEIM<2:0> = 010).
17.2.2.2
QEI x4 Update mode provides for a finer resolution of
the rotor position, since the counter increments or
decrements more frequently for each QEA/QEB input
pulse pair than in QEI x2 mode. This mode is selected
by setting the QEI mode select bits to ‘101’ or ‘110’. In
QEI x4, the phase measurement is made on the rising
and the falling edges of both QEA and QEB inputs. The
position counter is clocked on every QEA and QEB
edge.
Like QEI x2 mode, the position counter can be reset by
an input on the pin (QEIM<2:0> = 101), or by the period
match event (QEIM<2:0> = 010).
2010 Microchip Technology Inc.
Note 1:
QEIM<2:0>
000
001
010
011
100
101
110
111
QEI module is disabled. The position
counter and the velocity measurement
functions are fully disabled in this mode.
QEI MODES
QEI x2 Update Mode
QEI x4 Update Mode
index pulse
index pulse
x2 update/
x2 update/
x4 update/
x4 update/
Mode/
Reset
period
match
period
match
QEI MODES
—
—
—
—
QEI disabled.
Two clocks per QEA
pulse. INDX resets
POSCNT.
Two clocks per QEA pulse.
POSCNT is reset by the
period match (MAXCNT).
Unused.
Unused.
Four clocks per QEA and
QEB pulse pair.
INDX resets POSCNT.
Four clocks per QEA and
QEB pulse pair.
POSCNT is reset by the
period match (MAXCNT).
Unused.
Description
(1)
PIC18F2331/2431/4331/4431
17.2.3
The Position Counter register pair (POSCNTH:
POSCNTL) acts as an integrator, whose value is propor-
tional to the position of the sensor rotor that corresponds
to the number of active edges detected. POSCNT can
either increment or decrement, depending on a number
of selectable factors which are decoded by the QEI logic
block. These include the Count mode selected, the
phase relationship of QEA to QEB (“lead/lag”), the
direction of rotation and if a Reset event occurs. The
logic is detailed in the sections that follow.
17.2.3.1
In the first step, the active edges of QEA and QEB are
detected, and the phase relationship between them is
determined. The position counter is changed based on
the selected QEI mode.
In QEI x2 Update mode, the position counter
increments or decrements on every QEA edge based
on the phase relationship of the QEA and QEB signals.
In QEI x4 Update mode, the position counter
increments or decrements on every QEA and QEB
edge based on the phase relationship of the QEA and
QEB signals. For example, if QEA leads QEB, the
position counter is incremented by ‘1’. If QEB lags
QEA, the position counter is decremented by ‘1’.
17.2.3.2
The QEI control logic generates a signal that sets the
UP/DOWN bit (QEICON<5>); this, in turn, determines
the direction of the count. When QEA leads QEB,
UP/DOWN is set (= 1) and the position counter
increments on every active edge. When QEA lags
QEB, UP/DOWN is cleared and the position counter
decrements on every active edge.
TABLE 17-5:
QEA Rising
QEA Falling
QEB Rising
QEB Falling
Note 1:
Detected
Current
Signal
When UP/DOWN = 1, the position counter
is incremented. When UP/DOWN = 0, the
position counter is decremented.
QEI OPERATION
Edge and Phase Detect
Direction of Count
QEA QEB QEA QEB
DIRECTION OF ROTATION
x
x
Rising
Previous Signal
Detected
x
x
x
x
Falling
DS39616D-page 163
x
x
Cntrl.
Pos.
DEC
DEC
DEC
DEC
INC
INC
INC
INC
(1)
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