PIC18F2431-I/SP Microchip Technology, PIC18F2431-I/SP Datasheet - Page 196
![IC PIC MCU FLASH 8KX16 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2431-I/SP
Manufacturer Part Number
PIC18F2431-I/SP
Description
IC PIC MCU FLASH 8KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(40 pages)
8.PIC18F2431-ISP.pdf
(396 pages)
Specifications of PIC18F2431-I/SP
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18F2431-ISP PDF datasheet #8
- Current page: 196 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
18.10.3
Figure 18-21
might be generated using the PWM output override
feature. The figure shows a six-step commutation
sequence for a BLDC motor. The motor is driven
through a 3-phase inverter as shown in
When the appropriate rotor position is detected, the
PWM outputs are switched to the next commutation
state in the sequence. In this example, the PWM out-
puts are driven to specific logic states. The OVDCOND
and OVDCONS register values used to generate the
signals in
REGISTER 18-6:
REGISTER 18-7:
DS39616D-page 196
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
POVD7
POUT7
R/W-1
R/W-0
2:
(1)
(1)
Figure 18-21
Unimplemented in PIC18F2331/2431 devices; maintain these bits clear.
Unimplemented in PIC18F2331/2431 devices; maintain these bits clear.
With PWMs configured in Complementary mode, the output of even numbered PWM (PM0,2,4) will be
complementary of the output of odd PWM (PWM1,3,5), irrespective of the POUT bit setting.
OUTPUT OVERRIDE EXAMPLES
shows an example of a waveform that
POVD<7:0>: PWM Output Override bits
1 = Output on PWM I/O pin is controlled by the value in the Duty Cycle register and the PWM time base
0 = Output on PWM I/O pin is controlled by the value in the corresponding POUT bit
POUT<7:0>: PWM Manual Output bits
1 = Output on PWM I/O pin is active when the corresponding PWM output override bit is cleared
0 = Output on PWM I/O pin is inactive when the corresponding PWM output override bit is cleared
POVD6
POUT6
R/W-1
R/W-0
OVDCOND: OUTPUT OVERRIDE CONTROL REGISTER
OVDCONS: OUTPUT STATE REGISTER
(1)
(1)
are given in
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
POVD5
POUT5
R/W-1
R/W-0
Table
Figure
18-4.
POVD4
POUT4
R/W-1
R/W-0
18-16.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
POVD3
POUT3
R/W-1
R/W-0
The PWM Duty Cycle registers may be used in con-
junction with the OVDCOND and OVDCONS registers.
The Duty Cycle registers control the average voltage
across the load and the OVDCOND and OVDCONS
registers
Figure 18-22
and
register values used to generate the signals.
Table 18-5
(1,2)
control
POVD2
POUT2
shows the waveforms, while
R/W-1
R/W-0
show the OVDCOND and OVDCONS
the
2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
commutation
POVD1
POUT1
R/W-1
R/W-0
POVD0
POUT0
Table 18-4
R/W-1
R/W-0
sequence.
bit 0
bit 0
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