ATMEGA169L-8MI Atmel, ATMEGA169L-8MI Datasheet - Page 189

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ATMEGA169L-8MI

Manufacturer Part Number
ATMEGA169L-8MI
Description
IC MCU AVR 16K LV 8MHZ IND 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169L-8MI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA169L-4MI
ATMEGA169L-4MI
Analog Comparator
ADC Control and Status
Register B – ADCSRB
Analog Comparator Control
and Status Register – ACSR
2514H–AVR–05/03
The Analog Comparator compares the input values on the positive pin AIN0 and nega-
tive pin AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on
the negative pin AIN1, the Analog Comparator output, ACO, is set. The comparator’s
output can be set to trigger the Timer/Counter1 Input Capture function. In addition, the
comparator can trigger a separate interrupt, exclusive to the Analog Comparator. The
user can select Interrupt triggering on comparator output rise, fall or toggle. A block dia-
gram of the comparator and its surrounding logic is shown in Figure 81.
Figure 81. Analog Comparator Block Diagram
Notes:
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is
zero), the ADC multiplexer selects the negative input to the Analog Comparator. When
this bit is written logic zero, AIN1 is applied to the negative input of the Analog Compar-
ator. For a detailed description of this bit, see “Analog Comparator Multiplexed Input” on
page 191.
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off.
This bit can be set at any time to turn off the Analog Comparator. This will reduce power
consumption in Active and Idle mode. When changing the ACD bit, the Analog Compar-
ator Interrupt must be disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt
can occur when the bit is changed.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADC MULTIPLEXER
REFERENCE
ACME
ADEN
BANDGAP
OUTPUT
1. See Table 86 on page 191.
2. Refer to Figure 1 on page 2 and Table 28 on page 60 for Analog Comparator pin
placement.
(1)
ACBG
ACD
R/W
R
7
0
7
0
ACBG
ACME
R/W
R/W
6
0
6
0
ACO
N/A
5
R
R
5
0
R/W
ACI
4
0
4
R
0
(2)
ACIE
R/W
3
0
R
3
0
ADTS2
ACIC
R/W
R/W
2
0
2
0
ATmega169V/L
ACIS1
ADTS1
R/W
R/W
1
0
1
0
ACIS0
ADTS0
R/W
R/W
0
0
0
0
ADCSRB
ACSR
189

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