ATMEGA169L-8MI Atmel, ATMEGA169L-8MI Datasheet - Page 209

• Manufacturer Part Number: ATMEGA169L-8MI
• Description: IC MCU AVR 16K LV 8MHZ IND 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169L-8MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA169L-4MI; ATMEGA169L-4MI

ADC Control and Status
Register B – ADCSRB
Digital Input Disable Register
0 – DIDR0
2514H–AVR–05/03
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in “ADC Conversion
Result” on page 204.
• Bit 7 – Res: Reserved Bit
This bit is reserved for future use. To ensure compatibility with future devices, this bit
must be written to zero when ADCSRB is written.
• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will
trigger an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no
effect. A conversion will be triggered by the rising edge of the selected Interrupt Flag.
Note that switching from a trigger source that is cleared to a trigger source that is set,
will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set, this will
start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trig-
ger event, even if the ADC Interrupt Flag is set
Table 92. ADC Auto Trigger Source Selections
• Bit 7..0 – ADC7D..ADC0D: ADC7..0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is
disabled. The corresponding PIN Register bit will always read as zero when this bit is
set. When an analog signal is applied to the ADC7..0 pin and the digital input from this
pin is not needed, this bit should be written logic one to reduce power consumption in
the digital input buffer.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADTS2
0
0
0
0
1
1
1
1
ADC7D
R/W
R
7
0
7
–
0
ADC6D
ADTS1
ACME
R/W
R/W
6
0
6
0
0
0
1
1
0
0
1
1
ADC5D
R/W
5
0
5
–
R
0
ADC4D
R/W
ADTS0
4
0
R
4
–
0
0
1
0
1
0
1
0
1
.
ADC3D
R/W
3
0
R
3
–
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
ADC2D
ADTS2
R/W
R/W
2
0
2
0
ATmega169V/L
ADC1D
ADTS1
R/W
R/W
1
0
1
0
ADC0D
ADTS0
R/W
R/W
0
0
0
0
ADCSRB
DIDR0
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