ATMEGA169L-8MI Atmel, ATMEGA169L-8MI Datasheet - Page 69

• Manufacturer Part Number: ATMEGA169L-8MI
• Description: IC MCU AVR 16K LV 8MHZ IND 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169L-8MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA169L-4MI; ATMEGA169L-4MI

Alternate Functions of Port F
2514H–AVR–05/03
Table 40. Overriding Signals for Alternate Functions in PE3..PE0
Note:
The Port F has an alternate function as analog input for the ADC as shown in Table 41.
If some Port F pins are configured as outputs, it is essential that these do not switch
when a conversion is in progress. This might corrupt the result of the conversion. If the
JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS) and
PF4(TCK) will be activated even if a reset occurs.
Table 41. Port F Pins Alternate Functions
• TDI, ADC7 – Port F, Bit 7
ADC7, Analog to Digital Converter, Channel 7
TDI, JTAG Test Data In: Serial input data to be shifted in to the Instruction Register or
Data Register (scan chains). When the JTAG interface is enabled, this pin can not be
used as an I/O pin.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
1. AIN0D and AIN1D is described in “Digital Input Disable Register 1 – DIDR1” on page
191.
PE3/AIN1/
PCINT3
0
0
0
0
0
0
–
(PCINT3 •
PCIE0) +
AIN1D
PCINT3 • PCIE0
PCINT3 INPUT
AIN1 INPUT
Alternate Function
ADC7/TDI (ADC input channel 7 or JTAG Test Data Input)
ADC6/TDO (ADC input channel 6 or JTAG Test Data Output)
ADC5/TMS (ADC input channel 5 or JTAG Test mode Select)
ADC4/TCK (ADC input channel 4 or JTAG Test ClocK)
ADC3 (ADC input channel 3)
ADC2 (ADC input channel 2)
ADC1 (ADC input channel 1)
ADC0 (ADC input channel 0)
(1)
PE2/XCK/AIN0/
PCINT2
XCK OUTPUT
ENABLE
XCK
0
0
0
0
–
(PCINT2 • PCIE0) +
AIN0D
PCINT2 • PCIE0
XCK/PCINT2 INPUT
AIN0 INPUT
(1)
.
PE1/TXD/
PCINT1
TXEN
0
TXEN
1
TXEN
TXD
–
PCINT1 •
PCIE0
1
PCINT1 INPUT
–
ATmega169V/L
PE0/RXD/PCINT0
RXEN
PORTE0 • PUD
RXEN
0
0
0
–
PCINT0 • PCIE0
1
RXD/PCINT0
INPUT
–
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