PIC32MX675F512L-80I/PF Microchip Technology, PIC32MX675F512L-80I/PF Datasheet - Page 143
![IC MCU 32BIT 512KB FLASH 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC32MX675F512L-80I/PF
Manufacturer Part Number
PIC32MX675F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX675F512L-80I/PF
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
64KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC32MX320F032H-40IPT PDF datasheet
- PIC32MX575F256H-80IMR PDF datasheet #2
- PIC32MX575F256H-80IMR PDF datasheet #3
- PIC32MX575F256H-80IMR PDF datasheet #4
- PIC32MX575F256H-80IPT PDF datasheet #5
- Current page: 143 of 240
- Download datasheet (3Mb)
23.0
The Controller Area Network (CAN) module supports
the following key features:
• Standards Compliance:
• Message Reception and Transmission:
FIGURE 23-1:
2009 Microchip Technology Inc.
- Full CAN 2.0B compliance
- Programmable bit rate up to 1 Mbps
- 32 message FIFOs
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
CONTROLLER AREA
NETWORK (CAN)
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 34. “Controller
Area Network (CAN)” in the “PIC32MX
Family Reference Manual” , which is
available from the Microchip web site
(www.microchip.com/PIC32).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
CxRX
CxTX
PIC32MX CAN MODULE BLOCK DIAGRAM
Message Buffer 31
Message Buffer 1
Message Buffer 0
FIFO0
CAN Module
32 Filters
4 Masks
CAN Message FIFO (up to 32 FIFOs)
Message Buffer 31
Message Buffer 1
Message Buffer 0
System Bus
System RAM
FIFO1
Preliminary
PIC32MX5XX/6XX/7XX
• Additional Features:
Figure 23-1 illustrates the general structure of the CAN
module.
- Each FIFO can have up to 32 messages for a
- FIFO can be a transmit message FIFO or a
- User-defined priority levels for message
- 32 acceptance filters for message filtering
- Four acceptance filter mask registers for
- Automatic response to Remote Transmit
- DeviceNet™ addressing support
- Loopback, Listen All Messages and Listen
- Low-power operating modes
- CAN module is a bus master on the
- Use of DMA is not required
- Dedicated time-stamp timer
- Dedicated DMA channels
- Data-only Message Reception mode
total of 1024 messages
receive message FIFO
FIFOs used for transmission
message filtering
Request
Only modes for self-test, system diagnostics,
and bus monitoring
PIC32MX system bus
Message Buffer 31
Message Buffer 1
Message Buffer 0
CPU
FIFO31
2 or 4 Words
Buffer Size
Message
DS61156B-page 143
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