PIC32MX675F512L-80I/PF Microchip Technology, PIC32MX675F512L-80I/PF Datasheet - Page 88
![IC MCU 32BIT 512KB FLASH 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC32MX675F512L-80I/PF
Manufacturer Part Number
PIC32MX675F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX675F512L-80I/PF
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
64KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC32MX320F032H-40IPT PDF datasheet
- PIC32MX575F256H-80IMR PDF datasheet #2
- PIC32MX575F256H-80IMR PDF datasheet #3
- PIC32MX575F256H-80IMR PDF datasheet #4
- PIC32MX575F256H-80IPT PDF datasheet #5
- Current page: 88 of 240
- Download datasheet (3Mb)
TABLE 4-34:
TABLE 4-35:
Legend:
Note
Legend:
Note
6180
6190 PORTG
61A0
61B0
61A0
61B0
6180
6190 PORTG
TRISG
ODCG
1:
TRISG
ODCG
1:
LATG
LATG
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORT G REGISTER MAP FOR PIC32MX575F256H, PIC32MX575F512H, PIC32MX675F512H, PIC32MX695F512H, AND
PIC32MX795F512H DEVICES
PORT G REGISTER MAP FOR PIC32MX575F256L, PIC32MX575F512L, PIC32MX675F512L, PIC32MX695F512L, AND
PIC32MX795F512L DEVICES
TRISG15
ODCG15
LATG15
31/15
31/15
RG15
—
—
—
—
—
—
—
—
—
—
—
—
TRISG14
ODCG14
LATG14
30/14
30/14
RG14
—
—
—
—
—
—
—
—
—
—
—
—
TRISG13
ODCG13
LATG13
29/13
29/13
RG13
—
—
—
—
—
—
—
—
—
—
—
—
TRISG12
ODCG12
LATG12
28/12
28/12
RG12
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(1)
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISG9
ODCG9
TRISG9
ODCG9
LATG9
LATG9
25/9
RG9
25/9
RG9
—
—
—
—
—
—
—
—
TRISG8
ODCG8
TRISG8
ODCG8
LATG8
LATG8
24/8
24/8
RG8
RG8
—
—
—
—
—
—
—
—
Bits
Bits
TRISG7
ODCG7
TRISG7
ODCG7
LATG7
LATG7
23/7
RG7
23/7
RG7
—
—
—
—
—
—
—
—
TRISG6
TRISG6
ODCG6
ODCG6
LATG6
LATG6
22/6
RG6
22/6
RG6
—
—
—
—
—
—
—
—
21/5
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
20/4
20/4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISG3
ODCG3
TRISG3
ODCG3
LATG3
LATG3
19/3
RG3
19/3
RG3
—
—
—
—
—
—
—
—
TRISG2
ODCG2
TRISG2
ODCG2
LATG2
LATG2
18/2
RG2
18/2
RG2
—
—
—
—
—
—
—
—
TRISG1
ODCG1
LATG1
17/1
17/1
RG1
—
—
—
—
—
—
—
—
—
—
—
—
TRISG0
ODCG0
LATG0
16/0
16/0
RG0
—
—
—
—
—
—
—
—
—
—
—
—
0000
03CC
0000
xxxx
0000
xxxx
0000
0000
0000
F3CF
0000
xxxx
0000
xxxx
0000
0000
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