MC9S08GT16ACFDE Freescale Semiconductor, MC9S08GT16ACFDE Datasheet - Page 90
![IC MCU 16K FLASH 2K RAM 48-QFN](/photos/12/16/121644/mc9s08gt16a_sml.jpg)
MC9S08GT16ACFDE
Manufacturer Part Number
MC9S08GT16ACFDE
Description
IC MCU 16K FLASH 2K RAM 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08GT8ACFBER.pdf
(300 pages)
Specifications of MC9S08GT16ACFDE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
39
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
39
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
- Current page: 90 of 300
- Download datasheet (2Mb)
Parallel Input/Output
90
PTBDD[7:0]
PTBSE[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTBSE7
PTBDD7
Slew Rate Control Enable for Port B Bits — For port B pins that are outputs, these read/write control bits
determine whether the slew rate controlled outputs are enabled. For port B pins that are configured as inputs,
these bits are ignored.
0 Slew rate control disabled.
1 Slew rate control enabled.
Data Direction for Port B Bits — These read/write bits control the direction of port B pins and what is read for
PTBD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port B bit n and PTBD reads return the contents of PTBDn.
0
0
7
7
PTBDD6
PTBSE6
0
0
6
6
Figure 6-15. Data Direction for Port B (PTBDD)
Figure 6-14. Data Direction for Port A (PTBSE)
Table 6-8. PTBDD Field Descriptions
Table 6-7. PTBSE Field Descriptions
PTBDD5
MC9S08GT16A/GT8A Data Sheet, Rev. 1
PTBSE5
0
0
5
5
PTBDD4
PTBSE4
0
0
4
4
Description
Description
PTBDD3
PTBSE3
3
0
3
0
PTBDD2
PTBSE2
0
0
2
2
PTBSE1
PTBDD1
Freescale Semiconductor
0
0
1
1
PTBDD0
PTBSE0
0
0
0
0
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